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Silicon General.

LINEAR INTEGRATED CIRCUITS

VOLTAGE REGULATORS
OPERATIONAL AMPLIFIERS
INTERFACE CIRCUITS ^

TRANSISTOR ARRAYS

OTHER CIRCUITS

m SAIL

m

INTRODUCTION

Silicon General is the only semiconductor manufacturer
committed totally to one discipline — linear IC's. Our entire
organization is dedicated to this one area of specialization and
has been since inception in 1969. During this time we have
assembled one of the industry's broadest product lines. Most
industry-standard linears are available from stock through our
worldwide distributor network, and we have achieved an
excellent reputation as an alternate source for all types of
industrial, military and Hi-Rel requirements.

Silicon General has also made significant innovative
contributions, particularly in the design of new proprietary
voltage regulating and power control devices. The
SG 1524/2524/3524 Regulating Pulse Width Modulator has
rapidly captured the attention of power supply designers who
have utilized this device to achieve much greater efficiency and
lower costs in switching supplies. Silicon General will soon
introduce other new, highly advanced and original power control
devices and we will continue to provide an alternate source for
significant new linear devices.

This new catalog provides all the essential information you
need to specify Silicon General devices. Please note that these
devices are available in chip form and in a wide range of standard
packages. All devices are manufactured to the strict
requirements of MIL-STD-883, Level B and a complete range of
screening and testing capabilities to higher levels is available.

For additional information, please contact our local
representative or distributor in your area, or one of our factory
applications engineers will be glad to assist you.

PRODUCT SELECTOR GUIDE

REGULATORS

High Voltage,
Compensated

Page No.

Memory Drivers Page No.

55325/75325

Positive Adjustable

Page No.

1536/1 436/1 436C

52

High Current
Output Drivers

1627/3627 60

100/200/300

105/205/305/305A

117/217/317

10
10
13

Dual ..Compensated

747/747C
1558/1458

49
49

723/723C

19

Switch Drivers

1532/2532/3532

27

High Performance

1556/1456/1456C

52

1629/3629 62

Negative Adjustable

104/204/304

11

108/208/308
108A/208A/308A

46
46

TRANSISTOR ARRAYS

1511/3511

22

1118/2118/3118

46

Transistor Arrays

Dual Tracking

1118A/2118A/3118A

46

2001/2002/2003 69

1501 A/2501 A/3501 A

20

Micropower/Programmable

301 8/301 8A 70

1568/1468

31

1250/2250/3250

51

3045/3046/3146 70

41 94/41 94C

32

4250/4250C

51

3081/3082 71

4501

20

Voltage Followers

3083/31 83/31 83A 72
3086 70
3821/3822/3823 70
3851/3852/3853 73

Dual Tracking Adjustable

1502/2502/3502
Positive Fixed Voltage

21

102/202/302
110/210/310
High Slew Rate

44
44

109/209/309

12

741S/741SC

48

123/223/323

18

Quad

OTHER CIRCUITS

7805/7805C (140/340-05)
7806/7806C (140/340-06)

33
33

124/224/324

47

Wideband Amplifiers Page No.

7808/7808C (140/340-08)

33

733/733C 77

7812/7812C (140/340-12)

33

INTERFACE CIRCUITS

1401/2401/3401 78

7815/7815C (140/340-15)
7818/7818C (140/340-18)

33
33

Sense Amplifiers

552077520
552177521

Page No.

64
64

1402/2402/3402 79
3001 82

7824/7824C (140/340-24)
7805A/7805AC

33
36

Multipliers

7806A/7806AC

36

552277522

64

1595/1495 80

7808A/7808AC

36

552377523

64

Modulators

7812A/7812AC

36

552477524

64

1596/1496 81

7815A/7815AC

36

552577525
552777527

64
64

Zero Voltage Switches

7818A/7818AC

36

3058/3059/3079 83

7824A/7824AC

36

552877528
552977529

64
64

Timers

Negative Fixed Voltage

553477534

64

555/555C 75

120/220/320-05

15

553577535

64

556/556C 76

120/220/320-5.2

15

553877538

64

120/220/320-08

15

553977539

64

APPLICATIONS NOTES

120/220/320-12

15

120/220/320-15

15

Line Driver

Applications Notes Page No.

7905/7905C

39

1488

58

SG1 17 Voltage Regualtor 14

7905.2/7905.2C

39

Line Receivers

SG1401 Video Amplifier 85

7908/7908C

39

1 489/1 489A

59

SG1402 Wideband Amplifier/

7912/791 2C

39

55154/75154

66

Multiplier 87

791 5/791 5C

39

Bus Transceivers

SG1501A Dual Tracking

Regulating Pulse
Width Modulators

1524/2524/3524

23

55138/75138
Comparators

111/211/311
710/710C

65

55
57

Regulator 91
SG1524 Regulating Pulse

Width Modulator 95

OPERATIONAL

71 1/71 1C

57

OTHER INFORMATION

AMPLIFIERS

>

Quad Comparators

Other Information

139/239/339

56

Ordering Information 3

General Purpose,

139 A/239 A/339A

56

Product Quality Assurance 6

Compensated

3302

56

Cross Reference Guide 4

107/207/307

45

Dual Peripheral Drivers

Package Outlines 110

741/741 C

45

55450B/75450B

67

Package Cross

1760

53

55451 B/75451B

*

Reference Guide 112

1217/3217

45

55452B/75452B

*

Distributors 113

General Purpose,

Page No.

55453B/75453B

*

Representatives 114

Uncompensated

55454B/75454B

*

101/201

43

55460/75460

67

* Contact factory for data.

101 A/201 A/301 A

43

55461/75461

*

748/748C

50

55462/75462

*

777/777C

50

55463/75463

V

Data subject to change without notice.

1660

53

55464/75464

tice.

SG1543/2543/3543.

Power Supply Output Supervisory Circuit.

Refer to page 116.

SG1503/2503/3503.
Precision 2.5 Volt.
Refer to page 11 9.

ORDERING INFORMATION

Inquiries may be directed to the nearest distributor, representa-
tive or the factory. Headquarters' offices are located at 11651
Monarch Street, Garden Grove, California 92641. Telephone:
(714) 892-5531, TWX: 910-596-1804. Telex. 69-2411.

MIL-STD-883 Program - Parts tested and processed to 883 Level
A, B or C are marked with the appropriate level immediately after
the part no., i.e., SG101AT/883A, SG101AT/883B, SG101AT/
883C.

Integrated Circuit Marking and Product Code Explanation —

Where Silicon General is second-sourcing an existing device, the

company will use the number assigned by the company which
introduced the circuit, adding only an SG prefix.

Part number may include suffix letter "A" indicating an improved
electrical specification (SG101AT). Suffix letter "C" indicates
Commercial temperature range (SG741CT).

Federal Supply Code Number - Silicon General's Federal Manu-
facturer's Supply Code Number is 34333.

WHEN ORDERING
STANDARD PRODUCT

Specify:

• Generic part number (Includes designation for both electrical
grade and temperature range)

• Package type (see Table A, below)
Example:

, SG , 1524 ,J,

(1)

(2) (3)

(1) = Silicon General manufacture

(2) = Generic part type

(3) = Ceramic dual-in-line package

WHEN ORDERING
MIL-STD-883 SCREENED PRODUCT

Specify :

• Generic part number (prime electrical and -55°C to +125°C
temperature range is standard)

• Package type (see Table A below)

• Class of 883 screening

Example:

iSG,
(1)

1524
(2)

4
(3)

£83,
(4)

(5)

(1) = Silicon General manufacture

(2) = Generic part type

(3) = Ceramic dual-in-line package

(4) = Full screening to M I L-STD-883A

(5) - Class B screening level

WHEN ORDERING CHIPS

Refer to appropriate technical data sheet for schematic dia-
grams, electrical characteristics and other data. Order by SG
type numbers. All chips are 100% electrically tested @25°C to
minimum specifications on all key parameters. All chip lots are
visually inspected per MIL-STD-883, Method 2010, Condition B
minimum. Unless otherwise requested, visual characteristics are
guaranteed to a 10% LTPD.

All chip lots contain units which will meet both 0°C to +70°C
and -55°C to +125°C temperature ranges. Chips can be
guaranteed to military temperature range (-55°C to +125°C
specifications) upon special request. Chips can also be guar-
anteed to meet special parameter limits. Consult factory for
details.

All chips are available with gold backing. Please specify at time
of order if back metalization is required. Electrically tested,
inked wafers (scribed and unscribed) are also available (20%
LTPD).

Chips are shipped in 100-unit trays. Minimum order: $250.00
for standard device. Contact factory for additional pricing and
delivery.

TABLE B

Lead Finish Description

38510 Designator

Hot Solder Dip
Acid Tin Plate
Gold Plate

A
B
C

TABLE A

Package Description

Silicon General

Package

Designation

MIL-M-38510

Package

Designation

Package Description

Silicon. General

Package

Designation

MIL-M-38510

Package
Designation

2 Pin Metal Can TO-3

K

Y

16 Pin 1/4" x 7/8" Plastic Dip

N

_

2 Pin Metal Can TO-66

R

-

8 Pin 1/4" x 3/8" Ceramic Minidip

Y

_

3 Pin Metal Can TO-5 or TO-39

T

X

14 Pin 1/4" x 3/4" Ceramic Dip

J

C

3 Pin 3/8" x 3/8" Plastic TO-220

P

-

16 Pin 1/4" x 7/8" Ceramic Dip

J

E

8 Pin Metal Can TO-99

T

G

14 Pin 1/4" x 3/4" Metal/Glass Dip

D

C

9 Pin Metal Can TO-66

R

-

16 Pin 1/4" x 3/4" Metal/Glass Dip

D

E

1 Pin Metal Can TO-1 00 & TO-96

T

I

1 Pin 1 /4" x 1/4" Metal Flat Pack

F

H

12 Pin Metal Can TO-1 01

T

-

14 Pin 1/4" x 1/4" Metal Flat Pack

F

A

8 Pin 1/4" x 3/8" Plastic Minidip

M

_

16 Pin 1/4" x 3/8" Metal Flat Pack

F

F

14 Pin 1/4" x 3/4" Plastic Dip

N

-

*See page 1 13 for details of package outlines.

CROSS REFERENCE

PACKAGE
SUFFIXES

Y*\\ v\\\ \ \
Package ^»MNJ

i\

3,8, 10 Pin Metal Can

T

H

S;

L

G

T

T

T

8 Pin Plastic DILv

M

N

T

P

PI

E

N

V

14, 16 Pin Plastic DIL

N

N

P

N

P

E

CH
DB

N

14, 16 Pin Ceramic DIL

J

J

D

J

L

F

DC
DD

F

3 Pin TO-3 Power

K

K

K

-

K

-

LK

DA

8 Pin Ceramic DIL

Y

-

-

-

U

-

-

I

3 Pin TO-220 Plastic

P

T

U

K

T

-

Y

-

3, 9 Pin TO-66 Power

R

-

J

-

R

-

TK

DF

RAYTHEON

See page 1 12 for addition of package information

SG Direct

SG Direct

SG Direct

SG Direct

Raytheon

Replacement

Raytheon

Replacement

Raytheon

Replacement

Raytheon

Replacement

RM101D

SG101D

RC105T

SG305T

RC723D

SG723CD

RC1458T

SG1458T

RM101Q

SG101F

RC105AT

SG305AT

RM723T

SG723T

RC1488D

SG1488J

RM101T

SG101T

RC107D

JSG307D

RC723T

SG723CT

RC1489D

SG1489J

RM101AD

SG101AD

RC107Q

SG307F

RC723DP

SG723CN

RC1489AJ

SG 1489 A J

RM101AQ

SG101AF

RC107DN

SG307M

RM733D

SG733D

RC1556T

SG1456AT

RM101AT

SG101AT

RC107DP

SG307N

RC733D

SG733CD

RC1556T

SG1456T

RM1D5Q

SG105F

RC107T

SG307T

RM733T

SG733T

RM1556AT

SG 1556 AT

RM105T

SG105T

RC108D

SG308D

RC733T

SG733CT

RM1556T

SG1556T

RM107D

SG107D

RC108Q

SG308F

RC733DP

SG733CN

RC1558T

SG1558T

RM107Q

SG107F

RC108T

SG308T

RM741D

SG741D

RM4194L

SG4194J

RM107T

SG107T

RC108AD

SG308AD

RC741D

SG741CD

RC4194L

SG4194CJ

RM108D

SG108D

RC108AT

SG308AT

RM741Q

SG741 F

RM4194TK

SG4194R

RM108Q

SG108F

RC109H

SG309T

RC741Q

SG741CF

RC4194TK

SG4194CR

RM108T

SG108T

RC109L

SG309K

RM741T

SG741T

RC7520M

SG7520J

RM108AD

SG108AD

RM555T

SG555T

RC741T

SG741 CT

RC7520MP

SG7520N

RM108AQ

SG108AF

RC555T

SG555CT

RC741DN

SG741CM

RC7521M

SG7521J

RM108AT

SG108AT

RC555N

SG555CM

RC741DP

SG741CN

RC7521MP

SG7521N

RM109H

SG109T

RM710T

SG710T

RM747D

SG747D

RC7522M

SG7522J

RM109L ^

SG109K

RM710AT

SG710AT

RM747T

SG747T

RC7522MP

SG7522N

RM101T

SG301T

RC710T

SG710CT

RC747DF

SG747CD

RC7523M

SG7523J

RC101AD

SG301AD

RC710DP

SG710CN

RC747T

SG747CT

RC7523MP

SG7523N

RC101AQ

SG301AF

RM711T

SG711T

RM748T

SG748T

RC7524M

SG7524J

RC101DN

SG301AM

RC711T

SG711CT

RC748T

SG748CT

RC7524MP

SG7524N

RC101DP

SG301 AN

RC711DP

SG711CN

RC748DP

SG748IM

RC7525M

SG7525J

RC101AT

SG301AT

RM723D

SG723D

RC1458N

SG1458M

RC7525MP

SG7525N

RC105DP

SG305N

FAIRCHILD

SG Direct

SG Direct

SG Direct

Fairchild

Replacement

Fairchild

Replacement

Fairchild

Replacement

710F

SG710F

747DC

SG747CD

781 5HM

SG781 5T

710H

SG710T

747AHM

SG747AT

781 5HC

SG7815CT

710HC

SG710CT

747ADM

SG747AJ

781 5KM

SG7815K

710D

SG710D

747EHC

SG747ET

781 5KC

SG7815CK

710DC

SG710CD

747 E DC

SG747EJ

7818HM

SG7818T

71 1F

SG711F

748F

SG748F

781 8HC

SG7818CT

711H

SG711T

748H

SG748T

781 8KM

SG7818K

711D

SG71 1 D

748HC

SG748CT

7818KC

SG7818CK

71 IDC

SG711CD

748D

SG748D

7824HM

SG7824T

723 H

SG723T

748DC

SG748CD

7824HC

SG7824CT

723HC

SG723CT

776H

SG1250T*

7824KM

SG7824K

723D

SG723D

776HC

SG3250T*

7824KC

SG7824CK

723DC

SG723CD

777H

SG777T

9665D

SG2001J

733F

SG733F

777HC

SG777CT

9666D

SG2002J

733H

SG733T

777CT

SG777CM

9667 D

SG2003J

733HC

SG733CT

7805HM

SG7805T

78M05HM

SG7805T*

733D

SG733D

7805HC

SG7805CT

78M06HM

SG7806T*

733 DC

SG733CD

7805KM

SG7805K

78M08HM

SG7808T*

741 F

SG741 F

7805KC

SG7805CK

78M12HM

SG7812T*

741 H

SG741T

7806HM

SG7806T

78M15HM

SG7815T*

741 HC

SG741CT

7806HC

SG7806CT

78M24HM

SG7824T*

741 D

SG741 D

7806KM

SG7806K

78M05HC

SG7805CT*

741 DC

SG741CD

7806KC

SG7806CK

78M06HC

SG7806CT*

741 CT

SG741CM

7808HM

SG7808T

78M08HC

SG7808CT*

741 AHM

SG741 AT

7808HC

SG7808CT

78M12HC

SG7812CT*

741 ADM

SG741AJ

7808KM

SG7808K

78M15HC

SG7815CT*

741 EHC

SG741 ET

7808 KC

SG7808CK

78M24HC

SG7824CT*

741 E DC

SG741 EJ

781 2HM

SG7812T

75450AN

SG75450BN

747H

SG747T

781 2HC

SG781 2CT

75450AJ

SG75450BJ

747HC

SG747CT

781 2KM

SG7812K

75460AJ

SG75460J

747D

SG747D

781 2KC

SG781 2CK

75460AN

SG75460N

MOTOROLA

SG Direct

SG Direct

SG Direct

Motorola

Replacement

Motorola

Replacement

Motorola

Replacement

MC1436G

SG1436T

MC1711CF

SG711CF

MC7806CG

SG7806CT

MC1436CG

SG1436CT

MC1711CG

SG711CT

MC7806K

SG7806K

MC1455CG

SG555CT

MC1711CL

SG711CD

MC7806CK

SG7806CK

MC1455CP 1

SG555CM

MC1711F

DG711F

MC7808G

SG7808T

MC1456CG

SG1456CT

MC1711G

SG711T

MC7808CG

SG7808CT

MC1456G

SG1456T

MC1711L

SG711D

MC7808K

SG7808K

MC1458P 1

SG1458M

MC1723CG

SG723CT

MC7808CK

SG7808CK

MC1458G

SG1458T

MC1723G

SG723T

MC7812G

SG7812T

MC1468G

SG1468T

MC1723CL

SG723CD

MC7812CG

SG7812CT

MC1468L

SG1468J

MC1723L

SG723D

MC7812K

SG7812K

MC1468P

SG1468N

MC1741CF

SG741CF

MC7812CK

SG7812CK

MC1488L

SG1488J

MC1741CG

SG741CT

MC7815G

SG7815T

MC1489L

SG1489J

MC1741CL

SG741CD

MC7815CG

SG7815CT

MC1489AL

SG 1489 A J

MC1741CP-1

SG741CM

MC7815K

SG7815K

MC1495L

SG1495D

MC1741CP-2

SG741CN

MC7815CK

SG7815CK

MC1496G

SG1496T

MC1741F

SG741F

MC7818G

SG7818T

MC1536G

SG1536T

MC1741G

SG741T

MC7818CG

SG7818CT

MC1555G

SG555T

MC1741L

SG741 D

MC7818K

SG7818K

MC1 556G

SG1556T

MC1741SG

SG741ST

MC7818CK

SG7818CK

MC1 558G

SG1558T

MC1741SCG

SG741SCT

MC7824G

SG7824T

MC1568G

SG1568T

MC1741SCP-1

DG741SCM

MC7824CG

SG7824CT

MC1568L

SG1568J

MC1748G

SG748T

MC7824K

SG7824K

MC1 595L

SG1595D

MC1748CG

SG748CT

MC7824CK

SG7824CK

MC1 596G

SG1596T

MC3302P-I

SG3302N

MC7905CK

SG320K-05

MC1710CF

SG710CF

MC3302L

SG3302L

MC7912CK

SG320K-12

MC1710CG

SG710CT

MC7805G

SG7805T

MC7915CK

SG320K-15

MC1710CL

SG710CD

MC7805CG

SG7805CT

MC7952CK

SG320K-5.2

MC1710F

SG710F

MC7805K

SG7805K

MC75450P

SG75450BN

MC1710G

SG710T

MC7805CK

SG7805CK

MC75450L

SG75450BJ

MC1710L

SG710D

MC7806G

SG7806T

'Similar, not identical

UIDE

NATIONAL

SIGNETICS

SG Diraet

SO Diraet

SG Diraet

SG Diraet

National

RtpiMSCinsnt

National

R#pl4HS#in9nt

National

Replacement

National

Raplacamant

LM100H

SG100T

LM140K-18

SG140K-18

LM309H

SG309T

LM723CH

SG723CT

LM101D

SG101D

LM140H-24

SG140T-24

LM309K

SG309K

LM723CN

SG723CN

LM101F

SG101F

LM140K-24

SG140K-24

LM310H

SG310T

LM741F

SG741F

LM101H

SG101T

LM200H

SG200T

LM311H

SG311T

LM741H

SG741T

LM101AD

SG101AD

LM201 H

SG201T

LM312H

SG3118AT

LM741CH

SG741CT

LM101AF

SG101AF

LM201AH

SG201AT

LM317T

SG317T

LM741CN

SG741CM

LM101AH

SG101AT

LM202H

SG202T

LM317K

SG317K

LM741AD

SG741AJ

LM102H

SG102T

LM204H

SG204T

LM320H-O5

SG320T-05

LM741AH

SG741AT

LM104H

SG104T

LM205H

SG205T

LM320K-05

SG320K-05

LM747D

SG747D

LM105F

SG105F

LM207H

SG207T

LM320H-5.2

SG320T-5.2

LM747CD

SG747CD

LM10SH

SG105T

LM208H

SG208T

LM320K-5.2

SG320K-5.2

LM747F

SG747F

LM107D

SG107D

LM209H

SG209T

LM320H-12

SG320T-12

LM747H

SG747T

LM107F

SG107F

LM210H

SG210T

LM320K-1 2

SG320K-12

LM747CH

SG747CT

LM107H

SG107T

LM21 1 H

SG211T

LM320H-1 5

SG320T-15

LM747CN

SG747CN

LM108D

SG108D

LM212H

SG21 18AT

LM320K-15

SG320K-15

LM747AD

SG747AJ

LM108F

SG108F

LM21 7T

SG21 7T

LM323K

SG323K

LM747AH

SG747AT

LM108H

SG108T

LM217K

SG217K

LM324D

DG324J

LM748H

SG748T

LM108AD

SG108AD

LM220H-05

SG220T-O5

LM324N

SG324N

LM748CH

SG748CT

LM108AF

SG108AF

LM220K-05

SG220K-05

LM339D

SG339J

LM748CN

SG748CM

LM108AH

SG108AT

LM220H-5.2

SG220T-5.2

LM339AD

SG339AJ

LM1458N

SG1458M

LM109H

SG109T

LM220K-5.2

SG220K-5.2

LM339N

SG339N

LM1458H

SG1458T

LM109IC

SG109K.

LM220H-12

SG220T-12

LM339AN

SG339AN

LM1496N

SG1496N

LM110H

SG110T

LM220K-12

SG220K-12

LM340H-05

SG340T-05

LM1496H

SG1496T

LM111H

SG111T

LM220H-15

SG220T-15

LM340K-05

SG340K-05

LM1558H

SG1558T

LM112H

SG1118AT

LM220K-15

SG220K-15

LM340H-06

SG340T-06

LM1596H

SG1596T

LM117T

SG117T

LM223K

SG223K

LM340K-06

SG340K-06

LM3302D

SG3302J

LM117K

SG117K

LM224D

SG224J

LM340H-08

SG340T-08

LM3302N

SG3302N

LM120H-05

SG120T-05

LM239D

SG239J

LM340K-08

SG340K-08

LM4250H

SG4250T

LM120K-05

SG120K-05

LM239AD

SG239AJ

LM340H-1 2

SG340T-12

LM4250CH

SG4250CT

LM120H-5.2

SG120T-5.2

LM239N

SG239N

LM340K-12

SG340K-12

LM4250CN

SG4250CM

LM120K-5.2

SG120K-5.2

LM239AN

SG239AN

LM340H-15

LM340T-15

LM7520D

SG7520J

LM120H-12

SG120T-12

LM300H

SG300T

LM340K-1 5

LM340K-15

LM7520N

SG7520N

LM120K-12

SG120K-12

LM301AH

SG301 AT

LM340H-18

LM340T-18

LM7521D

SG7521J

LM120H-15

SG120T-15

LM301AD

SG301AD

LM340K-18

LM340K-18

LM7521N

SG7521N

LM120K-15

SG120K-15

LM301AF

SG301AF

LM340H-24

LM340T-24

LM7522D

SG7522J

LM123K

SG123K

LM301AN

£■5301 AM

LM340K-24

LM340K-24

LM7522N

SG7522N

LM124D

SG124J

LM302H

SG302T

LM367N

SG305M

LM7523D

SG7523J

LM139D

SG139J

LM304H

SG304T

LM555H

SG555T

LM7523N

SG7523N

LM139AD

SG139AJ

LM305H

SG305T

LM555C

SG555CT

LM7524D

SG7524J

LM140H-05

SG140T-05

LM305AH

SG305AT

LM555N

SG555CM

LM7524N

SG7524N

LM140K-05

SG140K-05

LM307D

SG307D

LM710H

SG710T

LM7525D

SG7525J

LM140H-06

SG140T-06

LM307F

SG307F

LM710AH

SG710AT

LM7525N

SG7525N

LM140K-06

SG140K-06

LM307H

SG307T

LM710CH

SG710CT

LM7528D

SG7528J

LM140H-08

SG140T-08

j LM307N

SG308M

LM710CN

SG710CN

LM7528N

SG7528N

LM140K-08

SG140K-08

LM308D

SG308D

LM711H

SG711T

LM7529D

SG7529J

LM140H-12

SG140T-12

LM308F

SG308F

LM711CH

SG711CT

LM7529N

SG7529N

LM140K-12

SG 140K -12

LM308H

SG308T

LM711CN

SG711CN

LM75450N

SG75450BN

LM140H-15

SG140T-15

LM308AD

SG308AD

LM723D

SG723D

LM140K-15

SG140K-15

LM308AF

SG308AF

LM723CD

SG723CD

LM140H-18

SG140T-18

LM308AH

SG308AT

LM723H

SG723T

SG Diraet

Signaties

Raplacamant

LM1001AF

SG101AD

/UA711CA

SG711CN

LM101AK

SG101AT

HA711CK

SG711CT

LM101F

SG101D

|JUA723L

SG723T

LM101Q

SG101F

/M723CL

SG723CT

LM101K

SGI 01 T

JUA723CA

SG723CN

LM107K

SG107T

AiA733K

SG733T

LM109DB

SG109T

JUA733I

SG733J

LM109DA,

SG109IC.

-JUA733CA

SG733CN

LM201AF

SG201AD

ptA733CK

SG733CT

LM201AK

SG201AT

/iA733CI

SG733CJ

LM201DF

SG201D

AIA741T

SG741JT

LM201K

SG201T

JUA741CA

SG741CN

LM201AN-14

SG201AN

MA741CT

SG741CT

LM201Y

SG201M

AJA741CV

SG741CM

LM201Q

SG201F

JUA747T

SG747T

LM207K

SG207T

P1A747CA

SG747CN

LM207Y

SG207M

/UA747CK

SG747CT

LM209DB

SG209T

i^tA748T

SG748T

LM209KDA

SG209K

JUA748CA

SG748CN

LM301AF

SG301AD

/UA748CT

SG748CT

LM301AH

SG301AT

/LIA748CV

SG748CM

LM301AN-14

SG301AN

S5556K

SG1556T

LM301AN

SG301AM

N5556K

SG1456T

LM307K

SG307T

N5556V

SG14S6M

LM307A

SG307M

S558K

SG1S58T

LM309DB

SG309T

N5558K

SG1458T

LM309K

SG309K

N5558V

SG1458M

SE555K

SG55SCT

S5596K

SG1596T

NE555F

SG555CT

N 5596 A

SG1496N

NE555Y

SG555CM

N5596K

SG1496T

SE556K

SG556T

SN7520A

SG7520N

NE556K

SG556CT

SN7521A

SG7521N

JUA710Q

SG710F

SN7522A

SG7522N

JJA710K

SG710T

SN7523A

SG7523N

MA710CA

SG710CN

SN7524A

SG7524N

JUA710CK

SG710CT

SN7525A

SG7525N

JUA711Q

SG711F

SN75450A

SG75450BN

AW711H

SG711T

RCA

SG Direct

RCA

Replacement

CA3001

SG3001

CA3083E

SG3083N

CA3018T

' SG3018T

CA3083F

SG3083J

CA3018AT

SG3018AT

CA3086E

SG3086N

CA3026T

SG3822T

CA3086F

SG3086J

CA3045F

SG3821J

CA3146E

SG3146N

CA3046E

SG3821N

CA3183E

SG3183N

CA3054E

SG3822N

CA3183AE

SG3183AN

CA3055T

SG300T

CA3741T

SG3741T

CA3058F

SG3058J

CA3741CT

SG741CT

CA3059F/E

SG3059J/N

CA3747CT

SG747CT

CA3079E

SG3079N

CA3747E

SG747N

CA3081 E

SG3081 N

CA3747T

SG747T

CA3081 F

SG3081J

CA3748CT

SG748CT

CA3082E

SG3082N

CA3748T

SG748T

CA3082F

SG3082J

TEXAS INSTRUMENTS

Texas

SG Direct

Texas

SG Direct

Texas

SG Direct

Texas

SG Direct

Texas

SG Direct

Texas

SG Direct

Instruments

Replacement

Instruments

Replacement

Instruments

Replacement

Instruments

Replacement

Instruments

Replacement

Instruments

Replacement

ULN2001J

SG2001J

SN52108L

SG108T

SN55450BJ

SG55450BJ

SN72308J

SG308D

SN7520J

SG7520J

SN75138J

SG75138J

ULN2002J

SG2002J

SN52108AF

SG108AF

SN55451 J

SG55451J

SN72308L

SG308T

SN7520N

SG7520N

SN75138N

SG75138N

ULN2003J

SG2003J

SN52108AJ

SG108AD

SN55452J

SG55452J

SN72308AZ

SG308AF

SN7521J

SG7521J

SG75154J

SG75154J

SN5520J

SG5520J

SN52108AL

SG108AT

SN55453J

SG55453J

SN72308J

SG308D

SN7521N

SG7521N

SG75325J

SG75325J

SN5521J

SG5521J

SN52555L

SG555T

SN55454J

SG55454J

SN72308L

SG308T

SN7522J

SG7522J

SN75325N

SG75325N

SN5522J

SG5522J

SN52710J

SG710D

SN55460J

SG55460J

SN72555L

SG555CT

SN7522N

SG7522N

SN75450BIM

SG75450BN

SN5523J

SG5523J

SN52710L

SG710T

SN55461J

SG55461J

SN72555P

SG555CM

SN7523J

SG7523J

SN75450BJ

SG75450BJ

SN5524J

SG5524J

SN52710S

SG710F

SN55462J

SG55462J

SN72710J

SG710CD

SG7523N

SG7523N

SN75451J

SG75451J

SN5525J

SG5525J

SN52711J

SG711D

SN55463J

SG55463J

SN72710L

SG710CT

SN7524J

SG7524J

SN75452J

SG75452J

SN5526J

SG5526J

SN5271 1 L

SG711T

SN55464J

SG55464J

SN72711J

SG711CD

SN7524N

SG7524N

SN75453J

SG75453J

SN5527J

SG5527J

SN52711Z

SG711F

SN55471J

SG55471J

SN7271 1 L

SG711CT

SN7525J

SG7525J

SN75454J

SG75454J

SN5528J

SG5528J

SN52733L

SG733T

SN55472J

SG55472J

SN72733L

SG733CT

SN7525N

SG7525N

SN75460N

SG75460N

SN5529J

SG5529J

SN52733N

SG733N

SN55473J

SG55473J

SN72733N

SG733CD

SN7528J

SG7528J

SN75460J

SG75460J

SN5534J

SG5534J

SN52741F

SG741F

SN55474J

SG55474J

SN72741Z

SG741CF

SN7528N

SG7528N

SN75461J

SG75461J

SN5535J

SG5535J

SN52741J

SG741D

SN7230U

SG101D

SN72741J

SG741CD

SN7529J

SG7529J

SN75462J

SG75462J

SN5536J

SG5536J

SN52741 L

SG741T

SN72301 L

SG201T

SN72741 L

SG741CT

SN7529N

SG7529N

SN75463J

SG75463J

SN5537J

SG5537J

SN52747J

SG747D

SN72301Z

SG201F

SN72741P

SG741CM

SN7534J

SG7534J

SN75464J

SG75464J

SN5538J

SG5538J

SN52747L

SG747T

SN72301AJ

SG301 AD

SN72741N

SG741CN

SN7534N

SG7534N

SN75471J

SG75471J

SN5539J

SG5539J

SN52748F

SG748F

SN72301AL

SG301AT

SN72747J

SG747CD

SN7535J

SG7535J

SN75472J

SG75472J

SN52107J

SG107D

SN52748J

SG748D

SN72301AZ

SG301 AF

SN72747L

SG747CT

SN7535N

SG7535N

SN75473J

SG75473J

SN52107L

SG107T

SN52748L

SG748T

SN72307J

SG307D

SN72747M

SG747CN

SN7538J

SG7538J

SN75474J

SG75474J

SN52107Z

SG107F

SN55138J

SG55138J

SN72307L

SG307T

SN72748F

SG748CF

SN7538N

SG7538N

SG1524

SG1524

SN52108F

SG108F

SN55154J

SG55154J

SN72307Z

SG307F

SN72748J

SG748GD

SN7539J

SG7539J

SG2524

SG2524

SN52108J

SG108D

SN55325J

SG55325J

SN72308Z

SG308F

SN72748L

SG748CT

SN7539N

SG7539N

SG3524

SG3524

■■■I

MIL~iVt-3$£10

mmmi

PRODUCT QUALITY ASSURANCE

Silicon General is totally committed to the manufacture of high-
reliability integrated circuits. This commitment extends through-
out the organization from initial product design to final shipment.

Silicon General integrated circuits are manufactured and exam-
ined to meet or exceed the requirements of MIL-STD-883 ., and,
in addition, the Company has implemented the capability for

complete screening and testing to the requirements of
MIL-M-38510.

Silicon General's manufacturing flow and standard quality assur-
ance procedures are outlined below. If more complete informa-
tion is required, the Silicon General Quality and Reliability
Manual is available on request.

Processing and Assembly Flow — The outline below describes the
standard production processing procedures used exclusively at
Silicon General to insure that all products are manufactured in
full conformance to the requirements of Ml L-Q-9858A and
MIL-STD-883 Condition B as a minimum.

Post-Assembly Screening Procedures - The company's unique
flexibility allows ready accommodations to special customer
requirements, including post assembly screening procedures in
compliance to MIL-M-38510 and MIL-STD-883, Method 5004.

Additional screens available on special request include: Scanning
Electron Microscope, Method 2018; Moisture Resistance, Method
1004; Variable Frequency Vibration, Method 2007 and Salt
Atmosphere, Method 1009.

MIL-M-38510 Qualification and Quality Conformance
Inspection — Group B, C and D tests are performed on a periodic
basis or when specified by the customer. This testing is in com-
pliance to MIL-M-38510 as detailed in MIL-STD-883, Method
5005.

STANDARD QUALITY ASSURANCE PROCEDURE

BASIC RAW MATERIALS - Silicon, Chemical, Masks,
Headers, Wire, etc.

▼ QC SAMPLE INSPECTION - Each arriving ship-
ment is assigned a lot code identification to assure
traceability and is then sample-processed through
mechanical, visual, electrical, and functional lot
acceptance testing prior to stocking.

WAFER FABRICATION

— ▼ 100% QC INSPECTION - At each photomasking
step, examining for:

• Mask alignment and resolution

• Oxide and diffusion quality

• In-process electrical evaluation

100% ELECTRICAL PROBE OF COMPLETED WAFER

Complete product performance testing on Teradyne J273
automatic test equipment to data sheet or customer
specified limits

▼ QC SAMPLE INSPECTION OF PROBING -

Performed on continuous sampling basis for
evidence of adequate probe contact, correct
inking, and freedom from probe point damage.

MANUFACTURING WAFER INVENTORY

4 WAFER SCRIBE AND BREAK

O 100% DIE SORT AT 100X MAGNIFICATION

— — ▼ QC SAMPLE INSPECTION (each lot) - Per
MIL-STD-883, Method 2010, Condition B
minimum magnification of 100X.

DIE ATTACH

-▼ QC CONTINUOUS SAMPLING INSPECTION -

Per MIL-STD-883A, Method 2010 , Condition B
minimum; Including die shear strength testing per
Method 2019.

— ▼ QC SAMPLE INSPECTION - MIL-STD-883
Method 2010, Condition B minimum, magnifi-
cation of 40X and 100X.

^ FINAL SEAL - Hermetically sealed in a controlled, dry-
nitrogen environment.

LEAD BOND

▼ QC CONTINUOUS SAMPLING INSPECTION -

Per MIL-STD-883, Method 2010, Condition B
minimum; including bond pull testing per
Method 201 1 , Condition D.

100% PRESEAL OPTICAL INSPECTION OF COM-
PLETED DEVICE - Per MIL-STD-883, Method 2010
Condition B minimum.

▼ QC LOT INSPECTION SAMPLING AND

ACCEPTANCE — Post cap visual inspection per
MIL-STD-883, Method 2010, Condition B;
including Bond Pull Strength testing per
Method 201 1, Condition D, and Die Shear
Strength testing per Method 2019.

MANUFACTURING POST-ASSEMBLY SCREENING

+ 100% ELECTRICAL TEST AND CLASSIFICATION -

Complete performance testing of all specified parameters
to either data sheet or customer specified limits.

9 MARKING — To customer specified or Silicon General
identification plus date code traceable to seal or lot
acceptance date.

PRESHIP PACKING

-▼ QUALITY ASSURANCE - Group A Preship
Electrical Test and Final Visual Inspection per
M I L-STD-883, Method 2009.

• SHIP

Post Assembly Screening Procedures

Silicon General manufactures products to the three standard levels of quality assurance processing outlined
below. In addition, the company's unique flexibility allows ready accommodations to special customer
requirements. The following screening procedures are in compliance to MIL-M-38510 and all methods are as
detailed in MIL-STD-883, Method 5004.

MIL-STD-883,CLASSA

MIL-STD-883, CLASS B

STANDARD PRODUCT

SCREEN

METHOD

REQM'T

METHOD

REQM'T

METHOD

REQM'T

Internal Visual
Pre or Post Cap

2010, Condition A

100%

2010, Condition B

100%

2010, Condition B

100%

Stabilization
Bake

1008, Condition C
24 Hours @150°C

100%

1008, Condition C
24 Hours @150°C

100%

1008, Condition C
24 Hours @150°C

100%

Temperature
Cycling

1010, Condition C
10 Cycles,
-65°Cto+150°C

100%

1010, Condition C
10 Cycles,
-65°Cto+150°C

100%

1010, Condition C
10 Cycles
-65°Cto+150°C

100%

Constant
Acceleration

2001, Condition E
30,000 g Y 2 then Y 1

100%

2001, Condition E
30,000 g, Y<\ Plane

100%

Hermeticity

a) Fine

b) Gross

1014, Condition A
Helium, 10" 8 ,
atm/cc/sec

1014, Condition C2
Fluorocarbon

100%
100%

1014, Condition A
Helium 5 X 10-8,
atm/cc/sec

1014, Condition C2
Fluorocarbon

100%
100%

1014, Condition A
Helium 10"?,
atm/cc/sec

1014, Condition C2
Fluorocarbon

5%
LTPD

5%
LTPD

Pre-Burn-in

Electrical

Test

Per Applicable

Procurement

Document

100%

Per Applicable

Procurement

Document

100%

Burn-in Test

1015, Condition A
240 Hours @ 125°C

100%

1015 #< Condition A

or F

168 Hours @125°C

100%

Per Applicable

Procurement

Document

Final Electrical
Test

a) DC@25°C

b) DC @ Max
and Min
Rated
Temperature

c) Dynamic
@25°C

d) Functional
@25°C

Per Applicable

Procurement

Document

100%
100%

100%
100%

Per Applicable

Procurement

Document

100%
100%

100%
100%

Per Applicable

Procurement

Document

100%
100%

Radiographic

Method 2012

100%

Qualification
and Quality
Conformance
Testing

Method 5005

Per

Applicable

Document

Method 5005

Per

Applicable

Document

DC Electrical
@25°C

5%
LTPD

External
Visual

Method 2009

100%

Method 2009

100%

Method 2009

100%

NOTE:

Additional Screens Available on Special Request —

• Scanning Electron Microscope, Method 201 £

• Moisture Resistance, Method 1004

• Variable Frequency Vibration, Method 2007

• Salt Atmosphere, Method 1009

VOLTAGE REGULATORS

Positive Adjustable Regulators
Negative Adjustable Regulators
3-Terminal, Adjustable Regulators
3-Terminal, Fixed Positive Regulators
3-Terminal, Fixed Negative Regulators
3-Terminal, 3-Amp, 5V Regulators
Precision Negative Regulator
Dual Polarity Tracking Regulators
Adjustable Dual Polarity Regulators
Switching Regulators

Positive Voltage Regulators

SG100/200/300

This circuit is a positive voltage regulator designed for both linear and
switching applications. With an input voltage rating of up to 40V, this
device will provide 20mA of load current by itself and more than 5 amps
with the aid of external transistors. Additional features include' low
standby power dissipation, fast transient response, and freedom from
oscillations.

• Output voltage adjustable from 2 to 30V

• Load regulation better than 0.05%/mA

• Line regulation better than 0.20%/V

• 1.0% maximum temperature variation

SG105/205/305/305A

This circuit is a positive voltage regulator designed for both linear and
switching applications. Inherent component tracking of the monolithic
integrated circuit process provides a high degree of stability and accuracy
in addition to fast response to both line and load transients. With an input
voltage rating of up to 50V, this device will deliver load currents of 20mA
(45mA with 305A). Adding external transistors will increase the current
capability to greater than 10 amps and further improve regulation.

• Output voltage adjustable from 4.5 to 40V

• Load regulation better than 0.01%/mA

• Line regulation better than 0.06%/V

• Ripple rejection of 0.01 %/V

• 1.0% maximum temperature variation

PARAMETERS*

100

200

300

105

205

305

305A

UNITS

Operating Temperature Range

-55 to +125

to +70

to +70

-55 to +125

-25 to +85

to +70

0to70

°C

Package Types

T,J,Y

T,J,Y, M,N

T,J, Y

T,J, Y,M,N

T

-

Input Voltage Range

8.5 to 40

8.0 to 30

8.5 to 50

8.0 to 40

8.5 to 50

V

Output Voltage Range

2.0 to 30

2.0 to 20

4.5 to 40

4.5 to 30

4.5 to 40

V

Input/Output Differential

3.0 to 30

3.0 to 20

3.0 to 30

3.0 to 30

3.0 to 30

V

Load Regulation

0.5 l > 2

0.1 2 ' 3

0.1 2 ' 3

20 2,3

%

Line Regulation V " ~ v out < 5V
V ln -V out >5V

0.2
0.1

0.06
0.03

%/V

Ripple Feed thru Cref = lOjuf, f = 120Hz

_

0.01

0.01

0.003 (typ)

%/V

Temperature Stability

1.0

2.0

1.0

1.0

1.0

%

Output Noise Voltage
(10Hz<f < 10KHz,C re f = 0)

0.005 (typ)

0.005 (typ)

0.005 (typ)

0.005 (typ)

0.005 (typ)

%

Feedback Sense Voltage

1.8 (typ)

1.8 (typ)

1.7 (typ)

1.7 (typ)

1.55 to 1.85

V

Standby Current Drain

3.0

3.0

2.0

2.0

2.0

mA

Minimum Load Current

3.0

3.0

mA

Long Term Stability

1.0

1.0

1.0

1.0

1.0

%

* Para meters apply at junction temperatures equal to or less than operating temperature range, and for a divider
impedance seen by the feedback terminal of 2Vft, unless otherwise specified.

Il_ < 12mA, Rsc = on. Output current and load regulation can be improved with external transistors.
Improvement factors will be approx. equal to the composite current gain of added transistors.
2
Applies for constant junction temperature. Temperature drift effects must be taken into account separately when
the unit is operating under conditions of high dissipation.

Same as Note 1, except Rsc = 10ft.

.043 1

CONNECTION DIAGRAMS
Regulator Connected for 2-Amp Output Basic Regulator Circuit

FEEOBACK.[i

COMPENSATION C .

REGULATED r
OUTPUT 1L

CURRENT r
LIMIT ill

NC E

e]NC

sJGNO

-. UNREGUL/
1) INPUT

jt BOOSTER
i OUTPUT

i] NC
TjNC

Negative Voltage Regulators

SG104/204/304

This circuit is a negative voltage regulator designed for both linear and
switching applications. It is a complement of the SG 100/200/300. SGI 05/
205/305 and SG723/723C intended for systems requiring regulated
negative voltages having a common ground with the unregulated supply.
With an input voltage rating of up to 50V, this device will deliver load
currents to 25mA. Adding external transistors will increase the current
capability to greater than 10 amps and further improve regulation.

• Output voltage adjustable from 15mV to 40V

• 1mV regulation no toad to full load

• 0.01 %/V line regulation

• 1% maximum temperature variation

PARAMETERS*

104

204

304

UNITS

Operating Temperature Range

-55 to +125

-25 to +85

Oto+70

oc

Package Types

T

Input Voltage Range

-50 to -8

-40 to -8

V

Output Voltage Range

-40 to -0.01 5

-30 to -0.035

V

Input/Output Differential l = 20 mA 1

2.0 to 50

2.0 to 40

V

Load Regulation 2 < l < 20 mA, R^. « 1.5ft

5mV

-

Line Regulation 3 V ° ut < " 5V

AV in = 0.1V in

0.1

%

Ripple Feed thru C 19 = 10/uf, f = 120Hz, -7V < V in < -15V

1.0

1.0

mV/V

Output Voltage Scale Factor R23 = 2.4kft

1.8 to 2.2

1.8 to 2.2

V/kft

Temperature Stability V <— 1V

1.0

1.0

%

Output Noise Voltage C 19 = 0/tiF BW ■- 10Hz to 10KHz V < -5V

0.007 (typ)

0.007 (typ)

%

Standby Current Drain V ■ 0, lj_ = 5 mA

2.5

2.5

mA

Long Term Stability V < -1 V

1.0

1.0

%

* Parameters apply at junction temperatures equal to or less than operating temperature range unless otherwise specified. The line and
load regulation specifications are for constant junction temperature. Temperature drift effects must be taken into account
separately when the unit is operating under conditions Of high dissipation.

With l = 5 mA, min differential is 0.5V. With external transistors differential is increased, in the worst case, by approx. lv.
2
Output current and load regulation can be improved with external transistors. Improvement factor will be approx. equal to the
composite current gain of added transistors.

With zero output, the dc line regulation is determined from the ripple rejection. Hence, with output voltages between volts
and —5 volts, a dc output variation, determined from the ripple rejection, must be added to find the worst-case line regulation.

Basic Negative Regulator Circuit

-GNO

SG104/204/304Chip (See T-package
diagram for pad functions)

CONNECTION DIAGRAM

UNREGULATED

11

5 Volt Fixed Voltage Regulators

SG109/209/309

The SG109 series is a completely self-contained 5V regulator. Designed
to provide local regulation at currents up to 1 amp for digital logic cards,
this device is available in two commonly used transistor packages - the
solid header TO-5 and the TO-3 power package.

A major feature of the SG109's design is its built-in protective features
which make it essentially blowout proof. These consist of both current
limiting to control the peak currents and thermal shutdown to protect
against excessive power dissipation. With the only added component being
the possible need for an input bypass capacitor, this regulator becomes
extremely easy to apply.

• Fully compatible with TTL and DTL

• Output current in excess of 1 amp

• Internal thermal overload protection

• No additional external components

PARAMETERS 1

109

209

309

UNITS

Operating Temperature Range

-55 to +150

-25 to +150

to +125

°C

Package Types

T, K

T. K

-

Output Voltage

4.9 to 5.1

4.8 to 5.2

V

Line Regulation 7V < Vj n < 25V

50

mV

Load Regulation 5mA < l olJt < 0.5 A (1.5A for TO-3)

TO-5: 50; TO-3: 100

mV

Total Output Voltage Tolerance

4.75 to 5.25

V

Quiescent Current Vj n < 25V

10

mA

Ripple Rejection 10 Hz < f < 10kHz

75 (typ)

dB

Output Noise Voltage 10Hz < f < 100kHz

40 (typ)

juVrms

Output Impedance 10Hz < f < 10kHz

0.1 (typ)

n

Long Term Stability

10

mV

* Unless otherwise specified, Tj = 25°C, V jn = 10 Volts, and l out = 0.1 A.

2 7V < V jn < 25V, 5mA < l out < 1.0 A (0-2 A for TO-5), P < 20W (2W for TO-5), ATj max.

Tjmax = — 55<>C to +150°C for the SG109
= — 25°C to +150°C for the SG209
= 0°Cto +125°Cfor the SG309

Adjustable

Output Regulator

l

SG109

2

J R1

CI

3

> 1% •

> R2

I ? 1K

Current Regulator

1

Fixed 5V Regulator

1

SG109

2

*C1 JL
0.22 ^F -r

3

Z C2

* REQUIRED IF REGULATOR IS AN
APPRECIABLE DISTANCE FROM
POWER SUPPLY FILTER.

t ALTHOUGH NO OUTPUT CAPACITOR
IS NEEDED FOR STABILITY, IT DOES
IMPROVE TRANSIENT RESPONSE.

NPUT t

C1 _L

0.22 n? ~r

Q

• DETERMINES OUTPUT CURRENT

CONNECTION DIAGRAMS
TOP VIEWS

SG109/209/309 Chip

\

1

P>Package
TO-220

Front
View

2 - Output

3 - Ground
Tab - Ground

Three Terminal Adjustable Voltage Regulator

SG117 / SG217 / SG317

Description

This monolithic integrated circuit is an adjustable 3-terminal positive
voltage regulator designed to supply more than 1.5 amps of load current
with an output voltage adjustable over a 1 .2 to 37 volt range. Although ease
of setting the output voltage to any desired value with only two. external
resistors is a major feature of this circuit, exceptional line and load
regulation are also offered. In addition, full overload protection consisting
of current limiting, thermal shutdown and safe-area control are included in
this device which is packaged in proven-reliability steel TO-3, TO-66 and
solid-based TO-39 packages. The SG1 1 7 is rated for operation from -55° C
to +150°C, the SG217 from -25° C to +150° C and the SG317 from 0°Ct6
+125°C.

Absolute Maximum Ratings

Features

• Output adjustable between 1.2 and 37 volts

• Output current in excess of 1.5 amps

• Floating operation for high voltages

• 0.1% line and load regulation

• Full overload protection

• High-reliability, hermetically-sealed package

• SG317 available in TO-220

CONNECTION DIAGRAMS

TOP VIEWS

Power Dissipation

Input-Output Voltage Differential

Storage Temperature

Internally Limited

40V

-65°Cto+l50°C

(( ®)) ADJUST

Operating Junction Temperature Range
SG117
SG217
SG317

-55°Cto+l50°C

-25°Cto+150°C

0°Cto+125°C

^^-—-"'iNPUT

T-Package
TO-39

Electrical Characteristics (See Note)

PARAMETER

CONDITIONS

SG1 17/21 7

SG317

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Line Regulation

T A • 25°C, 3V < (V|N - V ) < 40V

0.01

0.02

0.01

0.04

%/V

Load Regulation

T A • 25°C, V < 5V

5

15

5

25

mV

10 mA < Iq < IMAX v O > 5 V

0.1

0.3

0.1

0.5

%

Adjustment Pin Current

50

100

50

100

MA

Adjustment Pin Current Change

2.5V < (V| N - Vo> < 40V,
10 mA < l < IMAX

0.2

5

0.2

5

MA

Reference Voltage

3V < (V| N - V ) < 40V

10 mA<l < l MAX . P < PMAX

1.20

1.25

1.30

1.20

1.25

1.30

V

Line Regulation

3V< (V| N - V X 40V

0.02

0.05

0.02

0.07

%/V

Load Regulation

T A = 25°C. C ADJ -

20

50

20

70

mV

f» 120 Hz C/voj^lOmfd

0.3

1.0

0.3

1.5

%

Temperature Stability

T MIN^ T j^ T MA x

1.0

1.0

%

Minimum Load Current

(V |N - V > = 40V

3.5

5.0

3.5

10

mA

Current Limit

(V |N - V ) < 15V
<V IN ~ v O ) = 40v

1.5

2.2
0.4

1.5

2.2
0.4

A
A

Output Noise, RMS

T A = 25°C, 10 Hz < f ^ 10 kHz

0.003

0.003

%

Ripple Rejection

T A = 250C, C ADJ =

65

65

db

f=120Hz C A DJ=10mfd

66

80

66

80

db

Long Term Stability

T A =125°C

0.3

1

0.3

1

%/khr

Thermal Resistance, Junction
to Case

K Package

2.3

3

2.3

3

°C/W

T Package

12

15

12

15

°C/W

f 5 !

TO-220 Package

NOTE: Unless otherwise noted, the above specifications apply over the following conditions

-55°C< Tj< 150°C
-25°C< Tj< 150°C
0°C< Tj< 125°C
(V, N -V )=5V / I = 0.5A,I MAX = 1.5A
(V, N - V ) = 5V. I * 0.1 A, l MAX = 0.5A
All regulation specifications are measured at constant junction temperatures using low duty-cycle pulse testing.

' 13

SG117:
SG217:
SG317:
K-Package:
T -Pack age:

Three Terminal Adjustable Voltage Regulator

Typical Performance Characteristic*

Current Limiting

8

"Vfe.

s r \*

ise»c

/

T ( .-SS»C

^

^

~-~,

Tj'IS'Cy'"

8 10 21 30 M
INPUT-OUTPUT DIFFERENTIAL IV)

Temperature Stability

Dropou

t Voltage

S „

AV OOT »t0en.W

I

l L «1.U

l t «IA

1

1

l L *M»mA

*..

^jj'jOO^a'

It -20mA/

10

1

JUNCTION TEMPERATURE PC)

Minimum Operating Current

3
S2.0

T,

-ii^.-"" -

, ''''' ^

&"

■\v

IS0H

,

ZigHQ

p

f£*i

Tj = 2S»C

\

JUNCTION TEMFERATURE (»CI

INPUT -0UTFUT DIFFERENTIAL (V

APPLICATION DATA

The SG1 17 adjustable 3-terminal regulator is actually designed
to provide a fixed 1.25 volt reference voltage between the out-
put and adjustment terminals. This voltage is converted to a
programming current by the action of R1 as shown in Figure 1
and this constant current then flows through R2 to ground.
The output voltage of the regulator is then:

(♦8?)«

Since l ADJ is controlled to less than 100 fiA, the error asso-
ciated with this term is negligible. It should be noted that the
method of keeping l ADJ small is to return all the regulator
quiescent current to the output terminal. This imposes the
requirement for a minimum load current. If the load is less
than this minimum, the output will rise.

Since the SG1 17 is a floating regulator, it is only the input-
output voltage differential which is important to regulator
performance and operation at high voltages with respect to
ground are possible.

Good load regulation can be achieved with the SG117 even
without remote sensing, since the case is the output terminal
of the regulator which can be a very low impedance point.
For best performance, the programming resistor (R1) should

be connected as close to the regulator as possible; perhaps even
with a separate connection to the case. The ground end of R2
can be used as a remote sense lead and should be connected as
close to the load as possible.

No external capacitors are required with the SG117, but in
some applications, performance may be improved with added
capacitance as follows:

1. An input capacitor at 0.1 mfd will protect against
problems when high line impedance is present. The
device can be more sensitive to input impedance when
output or adjustment capacitors are used.

2. Bypassing the adjustment terminal to ground with a
10 mfd capacitor will improve the ripple rejection by
about 15 dB.

3. A 1 mfd tantalum capacitor on the output will improve
transient response and keep the regulator from ringing
due to light capacitive loading.

In addition to external capacitors, it is sometimes good prac-
tice to add protection diodes as shown in Figure 2 if there is a
chance that a capacitor may discharge through the regulator IC.

1 • -«■

-W-

FIGURE t. Basic Adjustable Regulator Circuit

FIGURE 2. Diode D 1 protects against C3 with an input short.
Diode D2 protects against C2 with an output short.

14

Three Terminal Negative Regulator Series

SG120/220/320

The SG 120 series of negative regulators offer self-contained fixed-
voltage capability up to 1 .5 amps of load current. With four factory set
output voltages (-5V, -5.2V, -12V and -15V) and four package options,
this regulator series is an optimum complement to the SG7800/140 line
of three terminal positive regulators.

Since these regulators require only a single output capacitor for
satisfactory performance, and are protected from overload conditions
by internal current limiting and thermal shutdown protection, ease of
application is assured.

Although designed as fixed-voltage regulators, the output voltage can
be increased through the use of a simple voltage divider. The low
quiescent drain current of the device insures good regulation when this
method is used. Product is available in hermetically sealed TO-39,
TO-66 and TO-3 power packages and commercial product is also
available in TO-220.

PACKAGES

TOP VIEWS

• Output voltage set internally to ±3%

• One volt minimum input-output differential

• Excellent line and load regulation

• Short circuit current limited

• Thermal overload protection

I I JiilK CH I.

jjp§MM|fc|L j 30 '**

ABSOLUTE MAXIMUM RATINGS

Input -Output

Device Output Voltage

Input Voltage

Differential

5.0 volts

-25V

25V

' 5.2 volts

-25V

25V

8.0 volts

-35V

30V

12 volts

-35V

30V

15 volte

-40V

30V

Power dissipation

Internally Limited

Operating junction temperature range

SG 120 series

-55<>Cto+1S0°C

SG220 series

-25©C to -H50OC

SG320 series

0°C to +125°C

Storage temperature renge

-65<>C to +150°C

Lead temperature (soldering.

10

sec)

300<>C

APPLICATIONS

Fixed Output Regulator

Dual Polarity, Trimmed Supply

^1

u

C2

1.0pF

l . Ci is required only if regulator is separated from rectifier filter.

2 Both Ci and C2 should be low ES.R: types such as solid tantalum. Ifalur
electrohticsare used, at least 10 times values shown should be selected.

3 If large output capacities are used, the regulators must be protected from r
tary input shorts. A high current diode from output to input will suffice.

Circuit for Increasing Output Voltage

C1 .

>

4

25„Fj

Rl

►' '. i

:*c 2

10uF

2.2* F'

t

R 2

, 3

SG120

2 I

1

SG140-15

2

POS.

'

♦15.0V

INPUT

3

^ 0.22 mfd .

► 61

510

► 20k

k

1

1N4720

0.1 mfd

L

<

:«

J

J

COMMON

♦_

C 2.2 mfd

510

\

fc <

►20k

i

k* * s

J

NEC.
INPUT

1

1N4720

3

2

15.0V

NOTE: C3 optional for improved
response and ripple rejecti

v (REGULATOR)

a 1 + «2.

WHERE R2 • 300n FOR SGI 20-5 AND SG120 5.2
R2 - 750J2 FOR SG120 12
R2 = 1000« FOR SG120-15

NOTE: This circuit will allow each output to be adjusted approximately ±1 volt around its nominal
value. While there is some interaction in the adjustments, it is typically less than 10%. The linearity
of the adjustment is a function of the potentiometer resistance with lower values increasing the
linearity at the expense of power dissipation. The diodes protect the regulators from output polarity
reversal due to inadvertent overloads or variations in input voltage sequencing.

This same technique may be used with other voltages and/or regulators in the series by merely
adjusting the circuit values.
_

120/220 ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE (Note 5)

120/220-5

120/220-5.2

120/220 -8

120/220 -

12

120/220 -

15

Units

NOMINAL OUTPUT VOLTAGE

-5

-5.2

-8

-12

-15

Volts

INPUT VOLTAGE (Uniess Otherwise Noted)

-10

-10

-13

-17

-20

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C, l = 5mA

-4.9

-5.1

-5.1

-5.3

-7.80

-8.20

-11.7

-12.3

-14.7

-15.3

Volts

Line Regulation
(Note 4)

Tj = 25°C, \q = 5 mA
AV|n Range

5 25
(-7V <V|n <-25V)
1 j

6 25
(-8V <V|N <-25V)
I I

10
(-10.5V<V,n
J

25
<-25V)

4 10
(-14V<V, N <-32V)»

5 10
M7V<V,n<-35V)

mV

Line Regulation

Tj = 25°C, l = 5 mA

I 3 I 15
(-8V<V|n<-12V)

I 6 ] 15
(-9V<V| N <-12V)

I 8
(-11V<V|n<

-17V)

I 8
(-16V<V|n<

s

;-22V)

1 .8 I .
(-20 V <V| N <-26V)

mV

Load Regulation
P, R, K-Package
T-Package (Note 3)

Tj = 25°C

5mA<lQ<1.5A

5mA<lo^500mA

15

5

50
40

20
6

-60
50

24
7

80
25

28
8

80
25

30
10

80
25

mV
mV

Load Regulation
P, R, K -Package
T-Package (Note 3)

Tj = 25°C
250 mA <l <750 mA
100mA<l <250mA

15
5

25
20

20
6

30
25

50

7

40
15

28
8

40
15

30
10

40
15

mV
mV

Total Output

Voltage Tolerance
K-Package
T-Package
R, P-Package

AIq Range

5 mA <Iq <1 .0A, P <20W
5 mA <l <200 mA, P <2W
5 mA <l <1 .0A, P <1 5W

(-7.5V
-4.8

<v, N *

%-25V)
-5.2

(-7.7V
-5.0

<V, N *

^-25 V)
-5.4

(-10.5V
-7.65

<V| N <-25V)
-8.35

(-14.5V<V||\|<-32V)
-11.5 -12.5

(-17.5V<V| N <-35V)
-14.5 -15.5

Volts

Quiescent Current

Tj = 25°C

1

2

1

2

1

2

1.5

4

1.5

4

mA

Quiescent Current
Change

Line AV|fg Range
Load AIq Range

1.3
.5

1.3
.5

1.0
.5

1.0
.5

1.0
.5

mA
mA

Long Term Stability

10u0 hours at Tj = 125°C

20

24

32

48

60

mV

Temperature Coefficient

lO = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

mV/°C

Ripple Rejection

f = 120 Hz, AV|N = 10V

54

60

54

60

54

60

54

60

54

60

dB

Output Noise Voltage

Tj = 250C. 10 Hz <f < 100 kHz

40

45

52

75

90

jUVrms

Dropout Voltage

Tj = 250C, lo = 1.0A (Note 3)

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 6)

2.1

2.0

1.8

1.5

1.3

Amps

Peak Output Current

Tj = 250C (Note 3)

2.5

2.5

2.5

2.5

2.2

Amps

Thermal Shutdown

Iq = 5 mA (Note 3)

175

175

175

175

175

°C

1. Tj = -55°C to +150°C, IfJUT = 500 mA for R * p and K-Package and 100 mA for T-Package, unless otherwise r

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. AV|m min. @ -55°C must maintain an input/output differential of 2.5V.
.5. P-Package available only in SG220.
6. Short circuit protection is only assured over AV||\j range.

320 ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE

320-5

320 -5.2

320-8

320-12

320-15

Units

NOMINAL OUTPUT VOLTAGE

-5

-5.2

-8

-12

-15

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

-10

-10

-13

-17

-20

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C, l = 5 mA

-4.8

-5.2

-5.0

-5.4

-7.7

-8.3

-11.6

-12.4

-14.6

-15.4

Volts

Line Regulation

Tj = 25°C, l = 5 mA
AV|N Range

f 5 40

(-7V <V| N <-25V)
1 |

6 40

(-8V<V| N <-25V)
| i

15
(-10.5V<V|N
I

40
^-25 V)

4 20
(-14V<V|M<-32V)
| |

15 20
(-17V<V|N<-35V)
1 1

mV

Line Regulation

Tj = 25°C, lo = 5 mA

1 5 J 25
(-8V<V, N <-12V)

I 6 I »
(-9V<V| N <-12V)

« 8 ' 40
(-11V<V|N<-17V)

' 12 I 60
(-16V<V| N <-22V)

1 1 J 7.

M7.5V<V| N <-30V)

mV

Load Regulation
P, R, K-Package
T-Package (Note 3)

Tj = 25°C

5mA<lQ<1.5A

5mA<l <500mA

15
5

100
50

20
6

100
50

12
4

100
40

28
8

80
40

30
10

80
40

mV
mV

Load Regulation
P, R, K-Package
T-Pqckage (Note 3)

Tj = 25°C
250 mA <l <750 mA
100mA<l <250mA

15
5

50
25

20
6

50
25

50

7

50
25

28
8

40
20

30
10

40
20

mV
mV

Total Output

Voltage Tolerance
K-Package
T-Package
R, P-Package

5 mA <l <1 .0A, P <20W
5 mA <Iq <200 mA, P<2W
5 mA <l <1 -0A, P <1 5W

(-7.5V
-4.75

<v IN <

^-25V)
-5.25

(-7.7V
-4.95

<v IN <

^-25V)
-5.45

(-10.5V
-7.6

'<V| N <-25V)
-8.4

M4.5V<V| N <-32V)
-11.4 -12.6

(-17.5V<V| N <-35V)
-14.4 -15.6

Volts

Quiescent Current

Tj = 25°C

1

2

1

2

1

2

1.5

4

1.5

4

mA

Quiescent Current
Change

Line AV|fg Range
Load AIq Range

1.3
.5

1.3
.5

1.0
.5

1.0
.5

1.0
.5

mA
mA

Long Term Stability

1000 hours at Tj = 125°C

20

24

32

48

60

mV

Temperature Coefficient

lO = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

mV/°C

Ripple Rejection

f=120Hz, AV|N = 10V

54

60

54

60

54

60

54

60

54

60

dB

Output Noise Voltage

Tj = 25°C, 10 Hz <f < 100 kHz

40

45

52

75

90

jUV rms

Dropout Voltage

Tj = 25°C, Iq = 1 .0A (Note 3)

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 4)

2.1

2.0

1.8

1.5

1.3

Amps

Peak Output Current

Tj = 25°C (Note 3)

2.5

2.5

2.5

2.5

2.2

Amps

Thermal Shutdown

l = 5 mA (Note 3)

175

175

175

175

175

°C

1 . Tj = 0°C to +125°C, louT = 5 00 mA for R » p a nd K-Package and 100 mA for T-Package. unless otherwise noted.

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. Short circuit protection is only assured over AV|N range.

3 Amp, 5 Volt Positive Regulator

SG123 / SG223 / SG323

Description

The SG123 is a three terminal, three amp, five volt
regulator similar to the LM123 but with a special low
voltage zener instead of the band gap reference. The SG123
has superior load regulation, lower input-output differential
minimums, lower quiescent current, and better temperature
coefficient. The circuit is specified identically to the
LM123 and is pin for pin compatible with that device.
The SG123 uses special processing techniques to achieve
reliable operation at high temperatures and high current
levels for extended periods of time.

The SG123 has been designed for ease of operation as well
as performance. It is completely internally phase
compensated, and requires no external capacitors unless
used with long lead lengths or high speed transients.
The device is protected by thermal shutdown, standard
current limiting, and an instantaneous power limiting
circuit sensitive to high input voltages. In addition, the
power transistor is an upgrade of previous three terminal
designs and is unusually rugged.

Operation is guaranteed over the junction temperature
range of — 55°C to +1 50°C. The SG223 is a similar
device guaranteed to operate from — 25°C to + 150°C.
The SG323 is guaranteed over the junction temperature
range of 0°C to -I 125°C.

Features

• 3A Output Currents

• Full Internal Protection

• 7.0 V Minimum Input Voltage, Typical

• Zener Reference for Top Performance

CONNECTION DIAGRAM

CHIP LAYOUT

TOP VIEW

K-Package

TO-3

tt^ofc&Pif

Absolute Maximum Ratings

Input Voltage

Power Dissipation

Operating Junction Temperature Range

SGI 23

SG223

SG323
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)

20V
Internally Limited

-55°Cto +150°C

-25°Cto +150°C

0°Cto +125°C

-65°Cto + 150°C

300°C

Electrical Characteristics (Note 1)

PARAMETER

CONDITIONS

SG123/SG223

SG323

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

T = 25°C

V = 7.5V, 1 =

4.7

5

5.3

4.8

5

5.2

V

Output Voltage

7.5V < V < 15V
< 1 < 3A, P < 30W

4.6

5.4

4.75

5.25

V

Line Regulation (Note 2)

T = 25°C

7.5V < V < 15V

5

25

5

25

mV

Load Regulation (Note 2)

T = 25°C, V = 7.5V
< 1 < 3A

25

100

25

100

mV

Quiescent Current

7.5V < V < 15V,
< 1 < 3A

12

20

12

20

mA

Short Circuit Current Limit

T = 25°C

V = 15V

V = 7.5V

3
4

4.5
5

3
4

4.5
5

A
A

Long Term Stability

35 1

35

mV

Thermal Resistance Junction
to Case (Note 3)

2

2

°C/W

Note 1: Unless otherwise noted, specifications apply for -55°C < T < + 150°C for the SG123, 25°C < T < f 150°C
for the SG223, and 0° < T < + 125°C for the SG323. Specifications apply for P < 30W. "" ~

Note 2: Load and line regulation are specified with high speed tests in order to separate their effects from temperature
coefficient. Pulse testing is required with a pulse width < 1 ms and a duty cycle < 5%.

Note 3: The junction to ambient thermal resistance of the TO-3 package is about 35°C W.

18

General-Purpose Positive Regulator

SG723/723C

This regulator is designed for use with either positive or negative
supplies as a series, shunt, switching, or floating regulator with currents
up to 150mA. Higher current requirements may be accommodated
through the use of external NPN or PNP power transistors.

• Positive or negative supply operation

• 0.03% line and load regulation

• Output adjustable from 2 to 37V

• Low standby current drain

• 0.002%/°C average temperature variation

PARAMETERS

723 *

723C 1

UNITS

Operating Temperature Range

-55 to +125

to +70

OC

Package Types

T*,J

T\J, N

-

Input Voltage Range

9.5 to 50

9.5 to 50

V

Output Voltage Range

2.0 to 37

2.0 to 37

V

Input/Output Differential

3.0 to 38

3.0 to 38

V

Load Regulation '

0.15

0.2

%v out

Line Regulation Vj n = 12 to 40V

0.2

0.5

%V ou t

Ripple Rejection C re f = 5/uF; f = 50Hz to 10KHz

86 (typ)

86 (typ)

dB

Reference Voltage

6.95 - 7.35

6.80 - 7.50

V

Temperature Stability

0.015

0.015

%/oc

Output Noise Voltage C re f = 0; BW = 100Hz to 10KHz

20 (typ)

20 (typ)

MV rms

Standby Current Drain

3.5

4.0

mA

Minimum Load Current

mA

Long Term Stability

0.1 (typ)

0.1 (typ)

%/khr

Parameters apply at T A = +25°C, except temperature stability is over temperature ranges.

Applies for constant junction temperature. Temperature drift effects must be taken into account s
when the unit is operating under conditions of high dissipation.

3 I L = 1 to 50 mA.

•T-package is TO-96 (can height: 240" max., 230" min.)

SG723/723C Chip
(See T-Package for pad functions)
Note: Vz (Pin X) is available only in
J or N-Package

High Current Regulator
External NPN Transistor
l L = 1A

Basic High Voltage Regulator
V out = 7 to 37 volts

CONNECTION DIAGRAMS

NC{i

gv.

vz {•

gVREF

vout£
v c £

TOP VIEW I
JorN |

-> NON-INVERTING
!J INPUT

71 INVERTING
?* INPUT
7i CURRENT
il SENSE

FREQ COMP £

Jl CURRENT
J LIMIT

NCO

n

[] NC

VZ available only in
J or N Package

Basic Low Voltage

Regulator

Vout * 2 to 7 volts

19

Dual-Polarity Tracking Regulators

SG1501A/2501A/3501A/4501

SG1501A dual tracking regulators are factory set to provide
balanced ±15V outputs, but a single external adjustment can be
used to change both outputs simultaneously. Line regulation of
20 mV and load regulation of 30 mV is guaranteed and, stability,
over temperature, is 1% or less. Provision is made for adjustable
current limiting and operation in excess of 2 amps is feasible with
external transistors.

In the SG1501A, a built-in sensing circuit monitors junction
temperature and' shuts down the regulator above 170°C
eliminating the need for concern about power dissipation under
short circuit conditions. The SG1501A series also offers superior
input/output voltage range and current handling capability (refer
to table of specifications).

• Thermal shutdown protection

• ±35V inputs

• Output current to 200mA

• Output adjustable from ±10V to ±23V

PARAMETERS 1

1501 A

2501 A

3501 A

4501

UNITS

Operating Temperature Range

-55 to +125

to +70

to +70

to +70

OC

Package Types

T, J

T.J.N

-

Output Voltage

±14.8/15.2

±14.5/15.5

±14.25/15.75

V

Input Voltage

±35

±30

±30

V

Input/Output Differential

2

2

2

V

Output Voltage Balance

150

300

300

mV

Line Regulation (Vj n = 17 to Vmax^

20

20

20

mV

Load Regulation (lj_ = to 50mA) 5

30

30

30

mV

Output Voltage Range

10 to 23

10 to 23

10 to 23

V

Input Voltage Range (8V out )

10 to 35

10 to 30

12to30 4

V

Ripple Rejection (f - 120Hz)

75 (typ)

75 (typ)

75 (typ)

dB

Temperature Stability

1.0

1.0

1.0

%

Short Circuit Current Limit

60 (typ)

60 (typ)

60 (typ)

mA

Output Noise Voltage

50 (typ)

50 (typ)

50 (typ)

juVrms

Positive Standby Current

4

4

4

mA

Negative Standby Current

5

5

5

mA

Long Term Stability

0.1 (typ)

0.1 (typ)

0.1 (typ)

%/khr

Output Current

200

200

100

mA

Thermal Shutdown Protection

yes

yes

yes

-

All specifications apply to both positive and negative sides of the regulator, either singly or together. Unless otherwise specified
T A = +25°C, V jn = 20V, V out = 15V, l L = 0, Rsc = 0&, CI = C2 = 0.01 mfd, C3 = C4 = 1.0 mfd, voltage adjust pin open

BW = lOOHzto 10kHz

10V output

Over temperature range

CONNECTION DIAGRAMS

SG1501A/2501 A/3501 A Chip (See T-package diagram
for pad. functions) Note: Balance Adjust (Pin X) is
available only on D or N package.)

NEG. INPUT V-[s

>] P0S. INPUT V+

NEG. INPUT V-

NC [»

6 1 NC

NEG. OUTPUT /-""TrT'-X POS. INPUT V+

NEG. OUTPUT H

TOP VIEW .

NEG. SENSE /0 Topvitw qW OUTPUT

NEG. SENSE !i

*} P0S. SENSE

package ;

NEG. STAB. \W ^ 7 POS. SENSE

NEG. STAB, i

j] POS. STAB.

\® (3) ®7

VOLT. ADJ>^ ^jL-^POS. STAB.

NC ji

2; BALANCE A0J.

V0LTA0J . k

jl

<: GND

GN0

See Applications Notes for additional information

20

Adjustable Dual-Polarity Tracking Regulators

SG1502/2502/3502

This circuit is identical to the SGI 501 series of dual polarity tracking
regulators except that the internal voltage setting resistors are not included
and the current limit inputs have been disconnected from the pass
transistors. While this circuit does require external divider resistors,
maximum versatility is offered in adjusting the output voltage levels, and
additional current-limit inputs ease the application of foldback current
limiting. In all other respects, this circuit performs as the SGI 501.

• Positive and negative output voltages

independently adjustable from 10 to 28V

• Output currents to 100mA

• Line and load regulation of 0.1%

• 1% maximum temperature variation

• Standby current drain only 4mA

• Internal thermal shutdown protection

PARAMETERS*

1502

2502

3502

UNITS

Operating Temperature Range

-55 to +125

to +70

to +70

OC

Package Types

jV

J, N

-

Input Voltage Range

±12/30

±12/25

V

Output Voltage Range

±10/28

±10/23

V

Input/Output Differential

2

2

V

Line Regulation (AV in = 10V) 5

0.2

0.2

%V ou t

Load Regulation 0i_ = to 50mA) a

0.3

0.3

%V ou t

Temperature Stability

1.0

1.0

%V ou t

Current Limit Sense Voltage

0.6 (typ)

0.6 (typ)

V

Reference Voltage

6.3/6.6

6.2/6.8

V

Ripple Rejection f = 1 20Hz

75 (typ)

75 (typ)

dB

Output Noise Voltage 2

50 (typ)

50

/tiVrms

Positive Standby Current 3

4

4

mA

Negative Standby Current

5

5

mA

Long Term Stability

0.1 (typ)

0.1 (typ)

%/khr

All specifications apply to both positive and negative sides of the regulator either singly or together. Unless otherwise specified
T A = +25°C, V, n = +20V, V out = +15 V, l L = 0, R sc = 0«, CI = C2 = 0.01 mfd, C3 = C4 = 1.0 mfd.

BW= lOOHztO 10kHz

Divider 1 = 0.5mA

1502 not available in plastic

Over temperature range

CONNECTION DIAGRAM

BASIC REGULATOR CIRCUIT

V|n OUT CL SENSE STAB I BAL GNO
raSITIVE I **"

NEGATIVE |

II OUT CL SENSE STAB I HEF

T«!

t

!?

jS L^-y.J |" |"

!»

NEGATIVE VO- *f™ 2 , POSITIVE V<> - {j} NEGATIVE V

For best temperature performance, the parallel im-
pedance of R1 and R2 should be 6.3 K ohm while
that of R3 and R4 should be 10 K. Increasing the
value of C1 and C2 will reduce the frequency response
while transient response may be improved by increas-
ing C3 and C4. For very low-noise applications, a 4.7
mfd capacitor for Cref may be added. Rsc is selected
such that a sense voltage of 0.6 volts (at Tj = 25°C)
is developed at the maximum load current desired.

NE6. INPUT V-5

3 POS. INPUT v+

NEC OUTPUT (•

•] POS. OUTPUT

CURRENT Si
LIMIT u

NEG. SENSE E

«.«.

71 CURRENT
51 LIMIT

«] POS. SENSE

NEC. STAB. £

3 POS. STAB.

REF. BYPASS £

Ij BALANCE
il ADJUST

VOLTAGE AOiUST^

n

j] GNO

See Applications Notes for additional information

21

Precision Negative Regulator

SG1511 / SG3511

Description

This monolithic voltage regulator is designed for negative
applications as a complement to the popular SG723
positive regulator and has the same high degree of
versatility, and wide range of applications. The SG1511 /
3511 regulator consists of a temperature compensated
reference, error amplifier, series pass transistor,
temperature compensated, low-threshold current limit and
remote shutdown circuitryrThis device by itself will
supply load currents of up to 50mA with higher current
requirements easily accommodated through the use of
external NPN or PNP power transistors.

The SG151 1 is specified to operate over the full military
temperature range of — 55°C to + 125°C while the SG351 1
is designed for commercial applications of 0°C to +70°C.

Features

• Output adjustable from -2 to -37 volts

• Output current to 50mA

• .002% /C average temperature variation

• Temperature compensated current limiting

• .03% line and load regulation

Absolute Maximum Ratings

Input voltage

Input-output voltage differential

Maximum output current

Current from V REF

Power dissipation

Derate above 25 °C
Operating temperature range
Storage temperature range

-40 volts
—40 volts
—50mA
— 5mA

680mW

5.4mW/°C
-55°Cto +125°C
-65°Cto +150°C

CONNECTION DIAGRAMS

N.C. (i

N.C. [»

-Voot f«

Current Limit |H

Current Sense fj

Compensation [n

Shutdown |m

TOP VIEW
JorN
Package

H

3 N.C.
i]N.C.

g-v 1N

3v BEF

3 Ground
2] Invert Input
1] Non. Inv. Input

Electrical Characteristics Unless otherwise specified,

T A = 25°C, V in = 12V, V ^-5V, l L = 1mA, R sc = Oil, C = 2200 pf, R S1) =

On.

Parameters

Conditions

Min.

Typ.

Max.

Units

Input Voltage Range

-9.5

40

V

Output Voltage Range

-2.0

37

V

Input-Output Differential

-3.0

38

V

Line Regulation

V„ I = -9to-12V

.01

0.1

% v

V,„ = -12 to -40V

.02

0.2

% v

Load Regulation

l r , = 1 to 20mA

.03

0.1

% v

Ripple Rejection

f ■= 50 Hz to 10 kHz

86

db

Temperature Stability

Over Operating Range

.002

.015

%/°c

Current Limit Sense Voltage

70

mV

Current Limit T c

i0.2

mV/°C

Reference Voltage

. -5.9

-6.2

-6.5

V

Shutdown Resistance (R s „)

2.0

3.0

5.0

K ohm

Standby Current Drain

V iM =-30V

1.5

2.5

mA

Output Noise Voltage

BW = 100Hz to lOKHz

20

MV,, ns

Long Term Stability

0.1

% 1 Khr.

Applications

Basic Negative Voltage Regulator (Fig. 1)

1. For low voltage applications, (V = — 2 to -

Ri -<- R 2

R 3 =

Ri R2

6V):

W7 ^R 7 <500 ilt A, R 4 =oo

2. For high voltage application, (V = —6 to —37V)
m — ^ KEP W* 3 + ^ 4 ) d _ R3 R4

V - p^ - . Rl - R 3 + R 4 . R2-00

3. For constant-current limiting:
r _ 70 mV

n * F ~ l s , (max)

4. If shut-down is not required, set R SD = 0.
Regulator will shut-down when R SD > 5K ohms.

High Current Applications (Fig. 2)

1. Select Ri, R 2 , R3 and R 4 as per basic regulator application.

2. For thermal shutdown, mount thermistor R s „ with close
thermal coupling to the 2N3055 power transistor.

3. R5 and R 6 provide foldback current limiting:
70mV _ 70mV V R 5

R„. ' '-"~ R S( . R S ,,(R5+R 6 )

l.c = -

(Fig. 1)

T

H

T R..
C.L. 1

u

[ «* Y 21

~T.

— *-v

1,

i :r. |r.

(Fig. 2)

&

Regulating Pulse Width Modulator

SG1524 / SG2524 / SG3524

Description

This monolithic integrated circuit contains all the control
circuitry for a regulating power supply inverter or switching
regulator. Included in a 16-pin dual-in-line package is the
voltage reference, error-amplifier, oscillator, pulse width
modulator, pulse steering flip-flop, dual alternating output
switches and current limiting and shut-down circuitry. This
device can be used for switching regulators of either polar-
ity, transformer coupled DC to DC converters, transformer-
less voltage doublers and polarity converters, as well as
other power control applications. The SG1524 is specified
for operation over the full military temperature range of
-55°C to +125°C, while the SG2524 and SG3524 are
designed for commercial applications of 0°C to +70°C.

Features

• Complete PWM power control circuitry

• Single ended or push-pull outputs

• Line and load regulation of 0.2%

• 1% maximum temperature variation

• Total supply current less than 10mA

• Operation beyond 100kHz

Absolute Maximum Ratings

Input Voltage

Output Current (each output)
Reference Output Current
Oscillator Charging Current

40V

100mA

50mA

5mA

Power Dissipation (package limitation)

1000mW

Derate above 25°C

8mW/°C

Operating Temperature Range

SG1524

-55°Cto+125°C

SG2524/SG3524

0°C to +70° C

Storage Temperature Range

-65°Cto+150°C

BLOCK DIAGRAM

CONNECTION DIAGRAM

CHIP LAYOUT

23

Regulating Pulse Width Modulator

SG1524 / SG2524 / SG3524

Electrical Characteristics (Unless otherwise stated, these specifications apply for T A =-55°C to ■»
+70°C for the SG2524 and SG3524, V IN = 20V, and f = 20kHz)

125°C for the SG1524 and 0°C to

PARAMETER

CONDITIONS

SG1

524

SG2524

SG3524

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Reference Section:

4.8

5.0

5.2

4.6

5.0

5.4

V

Output Voltage:

Line Regulation

V, N = 8 to 40 Volts

-

10

20

-

10

30

mV

Load Regulation

l L =0 to 20mA

-

20

50

-

20

50

mV

Ripple Rejection

f = 120Hz,T A =25°C

-

66

-

-

66

-

dB

Short Circuit Current Limit

V REF =0.T A =25°C

-

100

-

-

100

-

mA

Temperature Stability

Over Operating Temperature Range

-

0.3

1

-

0.3

1

%

Long Term Stability

T A =25°C

-

20

-

-

20

-

mV/khr

Oscillator Section:

C T = .001 mfd. R T = 2kS2

300

300

kHz

Maximum Frequency

Initial Accuracy

R T and C T constant

-

5

-

-

5

-

%

Voltage Stability

V, N = 8 to 40 Volts, T A = 25°C

-

-

1

-

-

1

%

Temperature Stability

Over Operating Temperature Range

-

-

2

-

-

2

%

Output Amplitude

Pin 3. T A = 25°C

-

3.5

-

-

3.5

-

V

Output Pulse Width

C T = .01 mfd,T A =25°C

-

0.5

-

-

0.5

-

MS

Error Amplifier Section:

V CM = 2.5 Volts

0.5

5

2

10

mV

Input Offset Voltage

Input Bias Current

V CM = 2.5 Volts

-

2

10

-

2

10

/uA

Open Loop Voltage Gain

72

80

-

60

80

-

dB

Common Mode Voltage

T A =25°C

1.8

-

3.4

1.8

-

3.4

V

Common Mode Rejection Ratio

T A =25°C

-

70

-

-

70

-

dB

Small Signal Bandwidth

A v =0vjB.T a =25°C

-

3

-

-

3

-

MHz

Output Voltage

T A =25°C

0.5

-

3.8

0.5

-

3.8

V

Comparator Section:

% Each Output On

45

45

%.

Duty Cycle

Input Threshold

Zero Duty Cycle

-

1

-

-

1

-

V

Input Threshold

Max. Duty Cycle

-

3.5

-

-

3.5

-

V

Input Bias Current

-

1

-

-

1

-

PA

Current Limiting Section:

Pin 9 = 2V with Error Amplifier
Set for Max Out, T A = 25°C

190

200

210

180

200

220

mV

Sense Voltage

Sense Voltage T.C.

-

0.2

-

-

0.2

-

mV/°C

Common Mode Voltage

-1

-

+1

-1

-

+1

V

Output Section: (Each Output)

40

40

V

Collector-Emitter Voltage

Collector Leakage Current

V CE = 40V

-

0.1

50

-

0.1

50

/iA

Saturation Voltage

l c = 50mA

-

1

2

-

1

2

V

Emitter Output Voltage

V IN = 20V

17

18

-

17

18

-

V

Rise Time

R c =2Kohm,T A =25°C

-

0.2

-

-

0.2

-

MS

Fall Time ,

R c =2Kohm,T A =25°C

-

0.1

-

-

0.1

-

MS

Total Standby Current:

V IN =40V

8

10

8

10

mA

(Excluding oscillator charging
current, error and current limit
dividers, and with outputs open)

OPEN LOOP TEST CIRCUIT

SG1524
7 2 19 10 4

A A N.I. A ,nv - A~ JL Shut icur

ORamp Omput Qlnput Q Comp. Down (Tyi

Rt< Cl ~

Regulating Pulse Width Modulator

SG1524 / SG2524 / SG3524

Oscillator

The oscillator in. the SG1524 uses an external resistor (R T )
to establish a constant charging current into an external
capacitor (C T ). While this uses more current than a series
connected RC, it provides a linear ramp voltage on the
capacitor which is also used as a reference for the compara-
tor. The charging current is equal to 3.6V -r R T and should
be kept within the range of approximately 30 juA to 2 mA,
i.e., 1 .8k < R T < 100k. The range of values for C T also has
limits as the discharge time of C T determines the pulse
width of the oscillator output pulse. This pulse is used
(among other things) as a blanking pulse to both outputs
to insure that there is no possibility of having both outputs
on simultaneously during transitions. This output dead
time relationship is shown in Figure 1. A pulse width below
approximately 0.5 microseconds may allow false triggering
of one output by removing the blanking pulse prior to the
flip-flop's reaching a stable state. If small values of C T
must be used, the pulse width may still be expanded by
adding a shunt capacitance (« 100 pf) to ground at the
oscillator output. (Note: Although the oscillator output is
a convenient oscilloscope sync input, the cable and input
capacitance may increase the blanking pulse width slightly.)
Obviously, the upper limit to the pulse width is determined
by the maximum duty cycle acceptable. Practical values of
C T fall between .001 and 1.0 mfd.

The use of Figure 2 will allow selection of Rj and C-r
for a wide range of operating frequencies. Note that for
series regulator applications, the two outputs can be con-
nected in parallel for an effective - 90% duty cycle and
the frequency of the oscillator is the frequency of the out-
put. For push-pull applications, the outputs are separated
and the flip-flop divides the frequency such that each
output's duty cycle is - 45% and the overall frequency is
Va that of the oscillator.

If it is desired to synchronize the SG 1524 to an external
clock, a pulse of « + 3 volts may be applied to the oscilla-
tor output terminal with R T C T set slightly greater than
the clock period. The same considerations of pulse width
apply. The impedance to ground at this point is approxi-
mately 2k ohms.

If two or more SG1524's must be synchronized together,
the easiest method is to interconnect all pin 3 terminals,
tie all pin 7's together and to a single C-r, leave all pin 6's
open except one which is connected to a single Rj.

The oscillator period is approximately t = R T C T where t is
in microseconds whenR T = ohms andC T = microfarads.

i 5

| 5

§ 3

» 2

i

i

§ °- 5

FIGL

.001 .002 .005 .01 .02 .05
TIMING CAPACITOR VALUE (C T ) - MICROFARADS

J RE 1. Output stage dead time as a function
of the timing capacitor value.

100

| 50

1 20

^V

^T2

*-3

\$r*$f*X t/

i»

Hr

*jr *£

r ^

°y *&

o s

i

2

' J

1

2

o s

1

M 21

DO 9

00 1

OSCILLATOR PERIOD - MICROSECONDS

FIGURE 2. Oscillator period as a function of Rj and Cj.

25

Regulating Pulse Width Modulator

SG1524 / SG2524 / SG3524

Current Limiting

The current limiting circuitry of the SG1524 is shown in
Figure 3.

By matching the base-emitter voltages of Q1 and Q2, and
assuming negligible voltage drop across R-,,

Threshold = V BE (Q1) + I, R 2 - V BE (Q2) = h R 2
»200mV

Although this curcuit provides a relatively small threshold
with a negligible temperature coefficient, there are some
limitations to its use, the most important of which is the
±1 volt common mode range which requires sensing in the
ground line, Another factor to consider is that the frequency
compensation provided by R-jC-, and Q1 provides a roll-
off pole at approximately 300 Hertz.

Since the gain of this circuit is relatively low, there is a

transition region as the current limit amplifier takes over
pulse width control from the error amplifier. For testing
purposes, threshold is defined as the input voltage to get
25% duty cycle with the error amplifier signaling maximum
duty cycle.

If this current limit circuitry is unused, pins 4 and 5 should
both be grounded.

In this conventional single-ended regulator circuit, the two outputs of
the SGI 524 are connected in parallel for effective - 90% duty -cycle
modulation. The use of an output inductor requires and R-C phase
compensation network for loop stability.

Push-pull outputs are used in this transformer-coupled DC-DC regu-
lating converter. Note that the oscillator" must be set at twice the
desired output frequency as the SG1524's internal flip-flop divides the
frequency by 2 as it switches the P.W.M. signal from one output to the
other. Current limiting is done here in the primary so that the pulse
width will be reduced should transformer saturation occur.

26

Precision General-Purpose Regulator

SG1532 / SG2532 / SG3532

DESCRIPTION

This monolithic integrated circuit is a versatile, general-
purpose voltage regulator designed as a substantially improved
replacement for the popular SG723 device. The SG1532 series
regulators retain all the versatility of the SG723 but have the
added benefits of operation with input voltages as low as 4.5
volts and as high as 50 volts; a low noise, low voltage refer-
ence; temperature compensated, low threshold current limit-
ing; and orotective circuits which include thermal shutdown
and independent current limiting of both the reference and
output voltages. Also included is a separate remote shutdown
terminal and - in the dual-in-line package - open collector
outputs for low input-output differential applications.

These devices are available in both hermetic 14-pin cerdip DIL
and 10-pin TO-96 packages. In the T-package, these units
are interchangeable with the LAS-1000 and LAS- 1 100
regulators. The SGI 532 is rated for operation over the tem-
perature range of -55<>C to +125QC while the SG2532 and
SG3532 are intended for industrial applications of 0°C to
+70OC.

FEATURES:

• Input voltage range of 4.5 to 50 volts

• 2.5 volt low noise reference

• Independent shutdown terminal

• Improved line and load regulation

• 80 mV current limit sense voltage

• Fully protected including thermal shutdown

• Useful output current to 150 mA

ABSOLUTE MAXIMUM RATINGS:

CONNECTION
DIAGRAMS

TOP VIEWS

CURRENT LIMIT

CURRENT SENSE

T-Package (TO-9i

SHUTDOWN

8

7

Vz

9

6

V 0UT

10

5

v c

11

4

v+

12

3

FREQ. COMP

13

2

N.C.

H r

I '

V REF

N.I. INPUT

INV. INPUT

CURRENT SENSE

CURRENT LIMIT

N.C.

J-Package (TO-116)

Input Voltage

SG 1532/2532
SG3532

Output Current

Reference Current

Zener current (J-package only)

Storage Temperature Range

Power Dissipation
T-Package (TO-96)
Derate Above 25°C

J-Package (TO-116)
Derate Above 25°C

Operating Temperature Range
SG1532
SG2532.and SG3532

50 Volts
40 Volts

250 mA

25 mA

25 mA

-65OCto+150OC

800 mW
6.4 mW/0C

1000mW
8mW/0C

-55QCto+125oC
QOC to +70OC

SIMPLIFIED SCHEMATIC

is numbered for J-Package — T-Package numbers in parenthesis

| ® VC

-©COMP

January 1978

27

Data subject to change without notice.

Precision General-Purpose Regulator

SG1532 / SG2532 / SG3532

ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

PARAMETER

CONDITIONS

SG1532/2532

SG3532

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Input Voltage

Ta = 250C

4.5

-

50

4.5

-

40

Volts

Input Voltage

Over Temperature Range

4.7

-

50

4.7

-

40

Volts

Output Voltage

2.0

-

38

2.0

-

38

Volts

Max Output Current

Rsc = 0, Vo = 0, T A = 250c

-

175

250

-

175

250

mA

Min(V||\|-Vo)

IO=100mA,TA = 25oc

-

1.7

2.0

-

1.7

2.0

Volts

Reference Voltage

Ta = 250C

2.40

2.50

2.60

2.40

2.50

2.60

Volts

Reference Voltage

Over Temperature Range

2.35

-

2.65

2.35

.r-

2.65

Volts

Temperature Stability

—

.005

.015

—

.605

.015

%/0C

Ref Short Ckt Current

VREF = / T A = 25OC

—

15

25

—

15

25

mA

Line Regulation

8V<V|N<40V

—

.005

.01

-

.005

.02

%/V

Line Regulation

8V< V|N<20V / lo = 25mA

-

.01

.02

-

.01

.03

%/V

Load Regulation

1 mA< lo< 25 mA

-

.002

.004

-

.002

.004

%/mA

Load Regulation

1 mA< lo< 100 mA

-

.002

.005

-

.002

.005

%/mA

Current Limit
Sense Voltage

RSC= 100ft, Vo =

.06

.08

.10

.06

.08

.10

Volts

Shutdown Voltage
Threshold

.40

.70

1.0

.40

.70

1.0

Volts

Shutdown Source
Current

Vo = high

100

200

300

100

200

300

MA

Zener Voltage

J-Package only

6.0

6.4

7.0

6.0

6.4

7.0

Volts

Standby Current

V|N = 40V

-

2.5

3.5

-

2.5

3.5

mA

Error Amplifier
Offset Voltage

2.0

10

2.0

15

mV

Error Amplifier
Input Bias Current

_

4

15

_

4

20

//A

Open Loop Gain

Ta = 250C

66

68

72

60

68

72

dB

Ripple Rejection

f= 120Hz, Ta = 250C

-

66

-

-

66

-

dB

Output Noise

10Hz < f < 100kHz, Ta = 250C

-

50

-

-

50

-

JuVrms

Long Term Stability

V|N = 30V,Ta= 1250C

-

0.3

1.0

-

0.3

1.0

%/kHr

Thermal Shutdown

-

175

-

-

175

-

OC

Note 1 : Unless otherwise specified, V||\| = 10V, Vo - 5V, Ifj :
Note 2: All regulation specifications are measured at constant
pulse test.

= 1 mA, Ta -" specified operating range,
junction temperature using low duty-cycle

Irnxnl j-package

/p-lr"

PACKAGE
CONFIGURATION

oat

0.220

IH-JL

T-PACKAGE
Ik (TO-96)

28

Precision General-Purpose Regulator

SG1532 / SG2532 / SG3532

STANDBY CURRENT

3

Tj = 125QC

2

/

/,

Tj = 250C

///

Tj = -55oc

1

20 30 40

Input Voltage - V

MINIMUM INPUT — OUTPUT VOLTAGE

I,s

Vo = 5V
RSC =
AVo = 100 mV

V+ toVo
Vc to Vo

Tj = -55QC
TJ = 25QC_

■H^ffS-

IijjS--

***&2-- ---

- — zzz

20 40 60 80 100
Load Current — mA

8 -4

CURRENT LIMITING

RIPPLE REJECTION

V|N =
Vo =

10V
5V

RSC

= 10U

tj
tj

= 125QC -
= 25oc -

vA

Tj

= -55QC —

-0

00

i -20
.2

S
'ST
CC

"5. -40

a
£

-60

V|M =

Vo =

I L =1

c c =

Tj = 2

10V
5V

1000 PF
50C

-80

20 40 60 80 100

Current Limit Sense Voltage - mV

Frequency — Hertz

FREQUENCY RESPONSE

TRANSIENT RESPONSE

80

1

V|N = 10V
Vo = 5V

*~^<s

40

^>

s Open Loop Gain ^S

\ |cc = o->

^ Cc = 1000 PF

l L =1r

nA

180

„ Pha

>e Angle

Cc = 0=-

^

^ X s

V

V

y- CC = 100(

PF >,

^'"

280

X^

f +50
O

|

Line Responsi

s

ft

I AV|N = 3V

' V|N = 10V, Vo = 5V

lL=1mA, Cc= 1000 PF
Tj = 250C, RsC =

\^ Load Response

AlL=10mA

/

'

1k 10k 100k 1M

Frequency — Hertz

> 10 15

Time — Microseconds

29

Precision General-Purpose Regulator

SG1532 / SG2532 / SG3532

APPLICATIONS

BASIC LOW CURRENT REGULATOR

v+
Vref

N.I.
S.D.
V-

vo
v z

C.L.

C.S.

INV

COMP

-1

; RSC

:ri

1

i

~1 ]

> R 2

GND — -

Vo- Vref (1*51)
R3 = Rl + R 2

ISC

Sense Voltage
RSC

Cc=1000PF
iQto 100 mA

HIGH CURRENT REGULATOR WITH FOLDBACK
CURRENT LIMITING AND REMOTE SHUTDOWN

+V| N -

R3 T

v c
v+

vref
n.i.

S.D.
V-

vo
vz

C.L.

C.S.

INV

COMP

"*^<

I

R4

■f VA — >

Rsc
.05n

Ri
5ion:

cc T

PF I

K R2<
510O

CO

4=100

MFD

Output Voltage = 5V Ljne Reg 10 - 30V = 3 mV

Max Output Current = 8A Load Reg - 5A = 17 mV

Min Vim at No Load = 6.9V Short Circujt Current = 1-8A
MinV|Nat5A = 8.2V

HIGH EFFICIENCY, LOW VOLTAGE REGULATOR

^ 2N6050

"I

:\M

;

vc
v+

vref
n.i.

S.D.
V-

vo
vz

C.L.

C.S.

INV.

COMP

R3^
40QS

2

RSC <

.01Q i

R1 <

5100^

■ + J

Co

-100
MFD

«

— I R2 :

510Q<

ic c

1000 PF

GND

90% EFFICIENT LINEAR REGULATOR

High /3 PNP

Output Voltage = 5V
Max Output Current = 9A
Min V|N at 5A = 7.0V

Line Reg 7- 20V = 10 mV
Load Reg - 5A = 25 mV
Constant Current Limiting

Output Voltage = 5V (Note 1)
Max Output Current = 3A (Note 2)
Min(V||\|-Vo>at2A = 0.4V
Line Reg 6- 30V = 10 mV
Load Reg - 2A = 20 mV

GND

Notes:

1. For output voltages above 8 volts and load currents
which allow PNP base current to be limited to 25 mA,
the internal zener may be used, eliminating the need
for the two external diodes and the divider on VreF-

2. Rsc can De eliminated if the 200 mA current limit
on Vo is adequate. Overall current limiting is depen-
dent upon PNP 0. For greater accuracy, load current
may be sensed in the ground line.

30

Dual-Polarity Tracking Regulator

SG1568/1468

SGI 568/1468 is a duat polarity tracking regulator designed to provide balanced positive and negative output voltages at currents to 100mA. The
device is set internally for ±15V outputs but a single external adjustment can be used to change both outputs simultaneously from 14.5 to 20 volts.
Input voltages up to ±30 volts can be used and there is provision for adjustable current limiting.

• Outputs balanced to within 1% (SG1568)

• Line and load regulation of 0.06%

• 1% maximum output variation due to temperature changes

• Standby current drain of 3.0mA

• Remote sensing provisions

PARAMETERS*

SG1568

SG1468

UNIT

Operating Temperature Range

-55 to +125

to +75

oc

Package Types

T,J

T,J,N

-

Peak Load Current

100

mA

Storage Junction Temp Range

-65 to +175

oc

Output Voltage

14.8/15.2

14.5/15.5

V

Input Voltage

30

30

V

Input-Output Voltage Differential

2.0

2.0

V

Output Voltage Balance

±150

±300

mV

Line Regulation Voltage
(V jn = 18V to 30V)
n"low ! toT nlgh 2 )

10
20

10
20

mV

Load Regulation Voltage

(l|_ = to 50 mA, Tj = constant)
< T A = T|ow to T high>

10
30

10
30

mV

Output Voltage Range

14.5/20

14.5/20

V

Ripple Rejection (f = 120Hz)

75 (typ)

75 (typ)

dB

Output Voltage Temperature Stability
(T, ow toT n j gn )

1.0

1.0

%

Short-Circuit Current Limit
(RSC ~ 1° ohms)

60 (typ)

60 (typ)

mA

Output Noise Voltage
(BW = 100Hz - 10kHz)

100 (typ)

100 (typ)

juV(rms)

Positive Standby Current
(V jn = +30V)

4.0

4.0

mA

Negative Standby Current
(V ln = -30V)

3.0

3.0

mA

Long-Term Stability

0.2 (typ)

0.2 (typ)

%/kHr

CONNECTION DIAGRAMS

(VCC = +20 V, V EE = — 20V, CI = C2 = 1500 pF, C3 = C4
l|_ + = l(_" = 0, T c = +25°C unless otherwise noted.)

! T| OW = OOC for 1468 2

= —55°C for 1568

■ 1.0 HF, R SC + = R sc ~ = 4.0ft,

•high

= +75° C for 1468

NEG. INPUT V- (l

i]. POS. INPUT V+

NCE

*\ NC

NEG. OUTPUT £
NEG. SENSE |t
NEG. COMP fi

Top View ,
JorN
Package

s] POS. OUTPUT
*} POS. SENSE
3] POS. COMP

NC £

i] BALANCE ADJ.

VOLT ADJ. £

n

T]gno

SG1568/1468 Chip (See J-Packqge
diagram for pad functions)

= +125°C for 1568

±1 .5 Amp Regulator
(Short Circuit Protected,
with Proper Heatsinking)

Basic 50 mA Regulator

♦v*

- V i„

;«sc*

GND

»wj

-;

1]

^

, I.0.F

I0»F ,

C1 and C2 should be located as close
to the device as possible. A 0.1 uF
ceramic capacitor may be required on
the input lines if the device is located
an appreciable distance from the
rectifier filter capacitors.

C3 and C4 may be increased to
improve load transient response and to
reduce the output noise voltage. At low
temperature operation it may be
necessary to bypass C4 with a 0.1//F
ceramic disc capacitor.

•TO

Ji

See Applications Notes for additional information.
31

Dual Tracking Voltage Regulator

SG4194

DESCRIPTION

The SG4194 is a dual polarity tracking regulator
designed to provide balanced or unbalanced output
voltages at currents up to 200 mA. Both output
voltages may be programmed between the limits of
±100 mV and ±42 volts by a single resistor. A balance
terminal allows adjustment for non-symmetrical
positive and negative output voltages.

This device is designed for ease of application with a
minimal number of external components. In addition,
internal current limiting and thermal shutdown
provide full overload protection.

The SG4194 regulator is available in two package
types to meet a wide range of dissipation requirements.
The R (TO-66) power package is rated at 3W at
Ta = 25oC, while the J (TQ-116) 14-pin ceramic
DIP will dissipate 1W at Ta = 25QC.

Balanced Output Voltage -

4.7^ F -vs=-15

RO<kn) = 2.5Vout

Unbalanced Output Voltage —

Adjust RO for -VS = -6V (15KS2 ) then
itR3for+VS = +12V(20Kft)

• Simultaneously adjustable outputs with one
resistor to ±42V

• Load current ±200mA

• Internal thermal shutdown at T= 175°C

• Provision for ±V unbalancing

• 3W power dissipation

• .2% load regulation

ABSOLUTE MAXIMUM RATINGS

Input Voltage ±V to Ground SG4194 : ±45V

SG4194C: ±35V

Input-Output Voltage Differential SG4194: ±45V

SG4194C: ±35 V
Power Dissipation at TA = 25°C

J Package LOW

Derate above 25°C 8 mW/°C

R Package 3.0W

Derate above 250C 24 mW/OQ

Load Current

J Package 1 50 mA

R Package 250 mA

Operation Junction Temperature Range

SG4194 -550C to +150°C

SG4194C 0OCto+125QC

Storage Temperature Range -65°C to +150°C

Lead Temperature (Soldering, 10s) +300°C

CONNECTION DIAGRAMS

"J" Dual In-Line Package

(TOP VIEW)

SG4194J

SG4194CJ

"R" (TO-66) Package

(TOP VIEW)

SG4194 R

SG4194CR

R -Package
Pin Numbers

ELECTRICAL CHARACTERISTICS

PARAMETER

CONDITIONS

SG4194

SG4194C

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Line Regulation

AVin = 0.1Vin

0.02

0.1

0.02

0.1

% Vout

Load Regulation

4194R: IL=1 to 200 mA
4194J: IL= 1 to 100mA

0.001

0.002

0.001

0.004

% Vo /mA

TC of Output Voltage

0.002

0.015

0.003

0.015

%/°c

Stand-By Current Drain
(NoteD

Vin = Vmax. Vo = 0V

+0.3

+1,0

+0.3

+1.5

mA

Vin = Vmax,V o = 0V

-1.2

-2.0

-1.2

-3.0

Input Voltage Range

±9.5

±45

±9.5

±35

V

Output Voltage Scale Factor

Rset = 71.5K,Tj = 25°C

2.45

2.5

2.55

2.38

2.5

2.62

Kft/V

Output Voltage Range

Rset = 71.5K

0.10

±42

0.10

±32

V

Output Voltage Tracking

1.0

2.0

%

Ripple Rejection

f = 1 20Hz, Tj = 25°C

70

70

dB

Input-Output Voltage
Differential

I l = 50mA

3.0

3.0

V

Output Short Circuit Current

Vin = ±30V Max

300

300

mA

Output Noise Voltage

Cl_ = 4.7jUF,V = ±15V
f = 10Hzto 100kHz

250

250

JUVRMS

Internal Thermal Shutdown

175

175

°c

Note 1 : ±l Quiescent wi " increase by 50/iA/V out on positive side and 100jUA/V out on negative side.

32

Voltage Regulators

SG7800 / 140/ 340 Series ^ 3-Terminal Positive Regulators

The SG7800/1 40/340 series of voltage regulators are monolithic
integrated circuits designed to provide fixed output voltages at currents
in exccess of one amp. These devices feature self-contained protective
features which make them essentially blow-out proof. These consist of
peak current limiting, safe-area control, and thermal shutdown for
protection against excessive power dissipation.

In addition to providing fixed voltages by themselves, these
regulators can be used with external components for adjustable outputs
and are available in TO-220 as well as hermetically sealed TO-39, TO-66
and TO-3 power packages.

• Output current in excess of one amp

• Internal thermal shutdown protection

• Self-contained foldback current limiting

• Hermetically sealed steel power package

Input voltage

Power dissipation (Note 1)
Storage temperature range
Operating junction temperature range

SG7800 series

SG7800C series

SG140 series

SG240 series

SG340 series
Lead temperature (soldering, 10 sec.)

+35V, except +40 for SG7824
Internally limited
-65° to +150° C

0to+150°C
to +125°C
-55°Cto+150°C
0to+150°C
0to+125°C
+300° C

SG7800/ SERIES SUMMARY

Part No.

SG7805/7805C, SG 140-05/340-05

SG7806/7806C, SG 140-06/340-06

SG7808/7808C, SG 140-08/340-08

SG7812/7812C, SG 140- 12/340- 12

SG7815/7815C, SG 140- 15/340- 15

SG7818/7818C, SG 140- 18/340- 18

SG7824/7824C, SG 140-24/340-24

Description

Positive 5- Volt Regulator

Positive 6-Volt Regulator

Positive 8- Volt Regulator

Positive 12- Volt Regulator

Positive 15- Volt Regulator

Positive 18- Volt Regulator

Positive 24- Volt Regulator

Tab

F°l

PACKAGES

P-Package
TO-220

FRONT VIEW

1 — Input

2 - Output

3 — Ground
Tab — Ground

T-Package
TO-39

TOP VIEWS

APPLICATIONS

Fixed Output Regulator

f T_

SG7800/140

T

= o.ipf

NOTES:

+ Increasing value of output capacitor increases system transient response.
++ Required only if regulator is located an appreciable distance from power supply filter.

Circuit for Increasing Output Voltage

I'

x

vo=v X x(i + py) + iqR2

High Input Current, Short Circuit Protected

R SC \ / 2N4398

SG7800/140

T

33

7800/140 ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE

7805
140-05

7806
140-06

7808
140-08

7812
140-12

7815
140-15

7818
140-18

7824
140-24

Units

NOMINAL OUTPUT VOLTAGE

5

6

8

12

15

18

24

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

10

11

14

19

23

27

33

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25C-C

4.8

5.2

5.75

6.25

7.7

8.3

f1.5

12.5

14.4

15.6

17.3

18.7

23.0

25.0

Volts

Line Regulation
(Note 4)

Tj = 250C

5 50
(7V<V| N <25V)

6 60
(8V<V| N <25V)

8
(10.5V <V| N

80
<25V)

12 120
(14.5V <V|M<30V)

15 150
(17.5V <V|N<30V)

20 180
( 21V<V|(vi<33V)

25 240
(27V<V|n<38V)

mV

Line Regulation
(Note 4)

Tj = 25<>C

(8V«

1

5 | 25
SV| N <12V)

I 6 I 30

(9V<V| N <13V)

J 8 I 40
(11V<V| N <17V)

I 12 I 60
(16V<Vj N <22V)

I 15 I 75
(20V<V| N <26V)

1 20 1 90
(24V <V| N <30V)

1 25 1 120
(30V <V, N <36V)

mV

Load Regulation

J R, K-Package
T-Package (Note 3)

Tj = 250C

6mA<l < 1.5A

5 mA < \q < 500 mA

15
5

50
25

20
6

60
30

24

7

80
40

28
8

120
60

30

10

150
75

40
12

180
90

50
16

240
120

mV
mV

Load Regulation

J R, K-Package
T-Package (Note 3)

Tj = 25°C
250 mA <l <750 mA
100mA<l <250mA

15
5

25
15

20
6

30
15

24

7

40
20

28
8

60
30

30
10

75
40

40
12

90
45

50
16

120
60

mV
mV

Total Output
Voltage Tolerance

AIq Range

K-Pkg: 5 mA <Iq <10A, P <20W

T-Pkg: 5 mA*< l <200 mA, P <2W

R-Pkg: 5mA<l <1.0A P<15W

4.75
(8V«

*V|N<

5.25
20V)

5.7
(9V«

;v, N <

6.3
21V)

7.6 8.4
(11.5V <I <23V)

11.4 12.6
(15.5V <V )N <27V)

14.25
(18.5V <V tN

15.75
^30V)

17.1 18.9
(22V<V| N <33V)

22.8 25.2
(28V<V|(\j<38V)

Volts

Quiescent Current

Tj = 25°C

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

mA

AV|n Range

Tj = -55°Cto+150°C

(8V«

%V|N<

25V)

(9V«

SV| N <

25V)

(11.5V

<v, N «

^25 V)

(15V

s;v, N <

30V)

(18.5V

<v, N

<30V)

(22V<V| N <33V)

(28V<V| N <38V)

Quiescent Current
Change

Over Line Regulation Ranga
Over Load Reflation Range

1.3
0.5

1.3
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

mA
mA

Long Term Stability

1000 hours at Tj = 125°C

20

24

32

48

60

72

96

mV

Temperature Coefficient

lO = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

-1.2

-1.5

mV/oc

Ripple Rejection

f = 120 Hz, AV| N = 10V

78

75

72

71

70

69

66

dB

Output Noise Voltage

Tj = 25°C, 10 Hz < f < 100 kHz

40

45

52

75

90

110

170

jUVrms

Oropout Voltage

Tj = 25°C, l = 1.0A (K-Pkg.only)

2.0

2.0

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note5>

2.1

2.0

1.8

1.5

1.3

1.0

0.7

Amps

Peak Output Current

Tj = 25°C

2.5

2.5

2.5

2.5

2.2

2.2

2.2

Amps

Thermal Shutdown

Iq = 5 mA

175

175

175

175

175

175

175

°C

1. Tj = -55°C to +150°C, louT = 500 mA for R, K-Package and 100 mA for T-Package, unless otherwise noted.

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. AV|n min. @ -55°C must maintain an input/output differential of 2.5V.

5. Short circuit protection is only assured over AV|M range.

7800C/340 ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE

7805C
340-05

7806C
340-06

7808C
340-08

7812C
340-12

781 5C
340-15

7818C
340-18

7824C
340-24

Units

NOMINAL OUTPUT VOLTAGE

5

6

8

12

15

18

24

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

10

11

14

19

23

27

33

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C

4.8

5.2

5.75

6.25

7.7

8.3

11.5

12.5

14.4

15.6

17.3

18.7

23.0

25.0

Volts

Line Regulation

Tj = 25°C

5 100
(7V<V| N <25V)

6 120
(8V<V| N <25V)

8 160
(10.5V <V|N< 25V)

12

(14.5V <V| N

240
<30V)

15
(17.5V<V| N

300
<30V)

20 360
(21V<V| N <33V)

25 480

(27V<V| N <38V)

mV

Line Regulation

Tj = 250C

(8V^

;V| N <12V)

I 6 I 60
(9V<V| N <13V)

I 8 I 80

(11V<V| N <17V)

I 12 I 120
(16V<V| N ^2V)

I 15 I 150
(20V<V| N <26V)

I 20 I 1 80
(24V<V| N <30V)

I 25 I 240
(30V<V|N<36V)

mV

Load Regulation

P, R, K-Package .
T-Package (Note 3)

Tj = 25°C

5 mA < l < 1.5A

5mA < l Q < 500mA

15
5

100
50

20
6

120
60

24
7

160
80

28
8

240
120

30
10

300
150

40
12

360
180

50
16

480
240

mV
mV

Load Regulation

P, R, K-Package
T-Package (Note 3)

Tj = 25°C
250 mA <l <750 mA
100mA<l o <250mA

15
5

50
25

20
6

60
30

24
7

80
40

28
8

120
60

30
10

150
75

40
12

180
90

50
16

240

120

mV
mV

Total Output
Voltage Tolerance

Alo Range
K-Pkg: 5 mA <l O <1-0A, P<20W
T-Pkg. 5mA<l O <200mA,P<2W
P, R-Pkg: 5mA<l Q <1 .0A P <1 5W

4.75
(7V<

V| N <2

5.25
0V)

5.7 6.3
(8V<V !N <21V)

7.6
(10.5V <V| N

8.4
<23V)

11.4 ■ 12.6
(14.5<V| N <27V)I

14.25
(17.5V <V| N

15.75
<30V)

17.1 18.9
(21V<V IN <33V)

22.8 25.2
(27V <V| N <38V)

Volts

Quiescent Current

Tj = 25°C

4

8.0

4

8.0

4

8.0

4

8.0

4

8.0

4

8.0

4

8.0

mA

AV|n Range

Tj = 0°C to +1 25°C

<7V«

*V| N <

25V)

(8V<

= V| N <

25V)

(10.5V

<V, N

<25V)

(14.5V

<V !N

<30V)

(17.5V <V||\|<30V)

(21V<V| N <33V)

(27V<V| N <38V)

Quiescent Current
Change

With Line AV|n Range
With Load Alo Range

1.3
0.5

1.3
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

mA
mA

Long Term Stability

1000 hours at Tj = 125°C

20

24

32

48

60

72

96

mV

Temperature Coefficient

lO = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

-1.2

-1.5

mV/OQ

Ripple Rejection

f = 120 Hz, AV| N = 10V

78

75

72

71

70

69

66

dB

Output Noise Voltage

Tj = 25°C, 10 Hz < f < 100 kHz

40

45

52

75'

90

110

170

jUVrms

Dropout Voltage

Tj = 25°C, lo = 1.0A (K-Pkg. only)

2.0

2.0

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 4)

2.1

2.0

1.8

1.5

1.3

1.0

0.7

Amps

Peak Output Current

Tj = 25°C

2.5

2.5

2.5

2.5

2.2

2.2

2.2

Amps

Thermal Shutdown

Iq = 5 mA

175

175

175

175

175

175

175

°C

1. Tj =0°Cto+125°C,

2. All regulation tests are

'OUT = 500 mA for P, R, K-Package and 100 mA for T-Package, i
made at constant junction temperature with low duty -cycle pulse

jnless otherwise n
testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. Short circuit protection is only assured over AV|n range.

Precision Positive Fixed Voltage Regulators

SG7800A / SG7800AC

The SG7800A and SG7800AC series ot voltage regulators are
monolithic integrated circuits designed to provide fixed output voltages
at currents in excess of one amp. These units feature a unique on-chip
trimming system to set the output voltage to within ±1 .5% of nominal. In
addition, improvements in input voltage capability and line and load
regulation have made these devices substantially superior while being
completely interchangeable with the standard SG7800, SG140 and
SG340 series devices.

All protective features of thermal shutdown, current limiting, and
safe-area control have been designed into these units with added
reliability offered by the hermetically sealed TO-39, TO-66 and TO-3
power packages. The commerical grade is also available in TO- 220
package.

ABSOLUTE MAXIMUM RATINGS:
Input voltage

Power dissipation (Note 1)
Operating Junction temperature range

SG7800A series

SG7800AC series
Storage temperature range
Lead temperature (soldering, 10 sec)

50 volts
Internally limited

-55° C to +150° C

0°Cto+125°C

-65°Cto+150°C

300° C

1 Output voltage set to within ±1.5% tolerance

1 Input voltage range to 50 volts max

1 Output current to 1.5 amp
Improved line and load regulation
Complete self-contained protective features

' Hermetically sealed steel power package

APPLICATIONS

ADJUSTABLE OUTPUT REGULATOR. 7 TO 30 VOLTS

CURRENT REGULATOR

t

rp0.33*F 3

n.

CIRCUIT FOR INCREASING OUTPUT VOLTAGE
INPUT

OUTPUT CURRENT •-

FIXED OUTPUT REGULATOR

/ FS2\
•V xx (l--)-. R2

OUAL POLARITY. TRIMMED SUPPLV

IT CURRENT. SHORT CIRCUIT PROTECTED

1N4720

1N4720

1.0 nF
-15.0V

o

INPUT

R1 '

3n J

|2N6124

I, 2N4398

2

SG78XXA

OUTPUT

0.33 _

«F ~

3

:o.i«f

THIS CIRCUIT WILL ALLOW EACH OUTPUT TO BE ADJUSTED APPROXIMATELY
*1 VOLT AROUND ITS NOMINAL VALUE. OTHER VOLTAGES MAY BE
ACCOMMODATED 8V MERELY CHANGING THE CIRCUIT VALUES AND/OR
REGULATORS.

PACKAGES

P-Package
TO-220

Front
View

1 — Input

2 - Output

3 — Ground,
Tab - Ground

J°l

A

\

K-Package
TO-3

TOP VIEWS

T-Package
TO-39

36

7800A ELECTRICAL CHARACTERISTICS (See

Motes 1 & 2)

DEVICE TYPE

7805A

7806A

7808A

7812A

7815A

7818A

7824A

Units

NOMINAL OUTPUT VOLTAGE

5

6

8

12

15

18

24

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

10

11

14

19

23

27

33

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C

4.9

5.1

5.9

6.1

7.85

8.15

11.8

12.2

14.8

15.2

17.7

18.3

23.6

24.4

Volts

Line Regulation
(Note 4)

Tj = 25°C

5
(7V<V| N <

25
25 V)

6
(8V<V| N <

30
25V)

8
(10.5V <V| N

40
<25V)

12 60
(14.5V <V| N <30V)

15 75
(17.5V <V| N <30V)

20 90

( 21V<V| N <33V)

25 120

(27V<V| N <38V)

mV

Line Regulation
(Note 4)

Tj = 25°C

(8V^

5 I 12
SV| N <12V)

I 6 I 15
(9V<V|N<13V)

I 8 I 20
(11V<V| N <17V)

I 12 I 30
(16V<V iN <22V)

I I
I 15 I 40
(20V <V| N <26V)

I 20 I 45
(20V<V| N <30V)

I 25 I 60
(30V<V| N <36V)

mV

Load Regulation

R, K-Package
T-Package (Note 3)

Tj = 25°C

5 mA < l < 1.5A

5 mA < lo < 500 mA

15
5

50
25

20
6

60
30

24
7

70
35

28
8

80
40

30
10

100
50

40
12

120
60

50
16

160
80

mV
mV

Load Regulation

R, K-Package
T-Package (Note 3)

Tj = 25°C
250 mA'<lQ <750 mA
100mA<lo<250mA

15
5

25
12

20
6

30
'15

24

7

35
17

28
8

40
20

30
10

50
25

40
12

60
30

50
16

80
40

mV
mV

Total Output
Voltage Tolerance

Alo Range
K-Pkg: 5 mA <Iq <1.0A, P <20W
T-Pkg: 5 mA < lo <200 mA, P <2W
R-Pkg: 5 mA <l <1 -0A P <1 5W

4.8

(8V«

SV| N <

5.2
20 V)

5.8 6.2

<9V<V|N<21V)

7.75

(11.5V <V| N

8.25
03V)

11.7 12.3
(15.5V <V| N <27V)

14.6
(18.5V <V| N

15.4
^30V)

17.5 18.5
(22V<V| N <33V)

23.3 24.7
(28V<V| N <38V)

Volts

Quiescent Current

Tj = 25°C

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

mA

AV||\j Range

Tj = -55°Cto+150°C

(8V«

SV||Nj<

25V)

(9V«

*v, N <

25V)

(11.5V

<V, N

05V)

(15V

<V iN <

-30V)

(18.5V <V | N

<30V)

(22V <V tN <33V)

(28V <V| N <38V)

Quiescent Current
Change

With Line AV|n Range
With Load AIq Range

1.3
0.5

1.3

0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0

0.5

1.0
0.5

mA
mA

Long Term Stability

1000 hours at Tj = 125°C

20

24

32

48

60

72

96

mV

Temperature Coefficient

\q = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

-1.2

-1.5

mV/°C

Ripple Rejection

f = 120 Hz, AV|N = 10V

78

75

72

71

70

69

66

dB

Output Noise Voltage

Tj = 25°C, 10 Hz < f < 100 kHz

40

45

52

75

90

110

170

/1V rms

Dropout Voltage

Tj = 25°C, lo = 1 0A (K-Pkg. only)

2.0

2.0

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 5)

2.1

2.0

1.8

1.5

1.3

1.0

0.7

Amps

Peak Output Current

Tj = 25°C

2.5

2.5

2.5

2.5

2.2

2.2

2.2

Amps

Thermal Shutdown

Iq = 5 mA

175

175

175

175

175

175

175

oc

li

1. Ta = -55°C to +150°C, louT = 5 °0 mA for R » K-Package and 100 mA for T-Package, unless otherwise n

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

4. AVin min. @ -55°C must maintain an input/output

5. Short circuit protection is only assured over AV|n

differential of 2.5V.

7800AC ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE

7805AC

7806AC

7808AC

781 2AC

7815AC

7818AC

7824AC

Units

NOMINAL OUTPUT VOLTAGE

5

6

8

12

15

18

24

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

10

11

14

19

23

27

33

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C

4.9

5.1

5.9

6.1

7.85

8.15

11.8

12.2

14.8

15.2

17.7

18.3

23.6

24.4

Volts

Line Regulation

Tj = 25°C

5 50
(7V<V| N <25V)

6 60
(8V<V !N <25V)

8
(10.5V <V| N

80
<25V)

12 120
(14.5V <V| N <30V)

15 150
(17.5V <V| N <30V)

20 180
( 21V<V|M<33V)

25 240
(27V<V| N <38V)

mV

Line Regulation

Tj = 25°C

(8V«

s |»

*V| N <12V)

I 6 I 30
(9V<V| N <13V)

I 8 I 40
(11V<V| N <17V)

I 12 I 60
(16V<V|N<22V)

I 15 I 75
(20V<V|N<26V)

I 20 I 90
(24V<V|N<30V)

I 25 I 120
(30V<V| N <36V)

mV

Load Regulation

P, R. K-Package
T-Package (Note 3)

Tj = 25°C

5mA<l < 1.5A

5mA<l < 500 mA

15
5

50
25

20
6

60
30

24

7

80
40

28
8

120
60

30
10

150
75

40
12

180
90

50
16

240
120

mV
mV

Load Regulation

P, R, K-Package
T-Package (Note 3)

Tj = 25°C
250mA<l o <750mA
100mA<l o <250mA

15
5

25
.15

20
6

30
15

24

7

40
20

28
8

60
30

30
10

75
40

40
12

90
45

50
16

120
60

mV

mV

Total Output
Voltage Tolerance

AlO Range

K-Pkg: 5 mA <I <1.0A. P <20W
T-Pkg: 5mA<l o <200mA,P<2W
P. R-Pkg: 5mA<l <1.0A P<15W

4.8
(7V =5

*V, N <

5.2
20 V)

5.8 6.2
(8V<V| N <21V)

7.75 8.25
(10.5<V|N<23V)

11.7 12.3
(14.5V <V| N <27V)

14.6

(17.5V <V| N

15.4
<30V)

17.5 18.5
(21V<V| N <33V)

23.3 24.7
(27V<V| N <38V)

Volts

Quiescent Current

Tj = 25°C

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

4

6.0

mA

AV||\| Range

Tj = 0°Cto+125°C

(7V«

*V| N <

25V)

(8V<

V| N <

25 V)

(10.5V

<V| N *

^25V)

(14.5V

<V| N

C30V)

(17.5V <V| N <30V)

(21V<V| N "<33V)

(27V<V|N<38V)

Quiescent Current
Change

With Line AV|n Range
With Load AIq Range

1.3
0.5

1.3
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

1.0
0.5

mA
mA

Long Term Stability

1000 hours at Tj = 125<>C

20

24

32

48

60

72

96

mV

Temperature Coefficient

l(3 = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

-1.2

-1.5

mVA>C

Ripple Rejection

f = 120 Hz. AV|M = 10V

78

75

72

71

70

69

66

dB

Output Noise Voltage

Tj = 25°C, 10 Hz < f < 100 kHz

40

45

52

75

90

110

170

jUVrms

Dropout Voltage

Tj = 25°C, Iq = 10A (K-Pkg. only)

2.0

2.0

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 4)

2.1

2.0

1.8

1.5

1.3

1.0

0.7

Amps

Peak Output Current

Tj = 25°C

2.5

2.5

2.5

2.5

2.2

2.2

2.2

Amps

Thermal Shutdown

Iq = 5 mA

175

175

175

175

175

175

175

°C

1. Tj = 0°C to +125°C, louT = 500 mA f or R » P. K-Package and 100 mA for T-Package, unless otherwise n

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. Short circuit protection is only assured over AV|n range.

Three Terminal Negative Regulator Series

SG7900/SG7900C

The 7900 series of negative regulators offer self-contained, fixed-
voltage capability up to 1.5 amps of load current. With four factory set
output voltages (-5V, -5.2V, -12V, and -15V) and four package options,
this regulator series is an optimum complement to the SG7800/140 line
of three terminal positive regulators.

Since these regulators require only a single output capacitor for
satisfactory performance, and are protected from overload conditions
by internal current limiting and thermal shutdown protection, ease of
application is assured.

Although designed as fixed-voltage regulators, the output voltage
can be increased through the use of a simple voltage divider. The low
quiescent drain current of the device insures good regulation when this
method is used. Product is available in hermetically sealed TO-39,
TO-66 and TO-3 power packages and commercial product is also
available in TO-220.

{

P-Packaga
TO-220

FRONT VIEW

1 - Ground

2 - Output

3 - Input
Tab - Input

• Output voltage set internally to ±3%

• One volt minimum input-output differential

• Excellent line and load regulation

• Short circuit current limited

• Thermal overload protection

ABSOLUTE MAXIMUM RATINGS

Input-Output

Device Output Voltage

Input Voltage

Differential

5.0 volts

-25V

25V

5.2 volts

-25V

25V

8.0 volts

-35V

30V

12 volts

-35V

30V

15 volts

-40V

30V

Power dissipation

Internally Limited

Operating junction temperature range

SG7900 series

-55°Cto+150°C

SG7900C series

0°Cto+125°C

Storage temperature range

-65° C to +150°C

Lead temperature (soldering

,10

sec)

300°C

APPLICATIONS

Fixed Output Regulator

Dual Polarity, Trimmed Supply

a

2.2nF
INPUT

u

ii

c 2

Out

1 . Ci is required only if regulator is separated from rectifier filter.

2. Both Ci and C2 should be low E.S.R. types such as solid tantalum. If aluminum
electroliticsare used, at least 10 times values shown should be selected.

3. If large output capacities are used, the regulators must be protected from momen
tary input shorts. A high current diode from output to input will suffice.

Circuit for Increasing Output Voltage

T~ *-

1

2

POS.

1

+ 15.0V

3

r 0.22 mfd i

510 ,

► 20k

2

*■ ;

0.1 mfd

*

<Af\ ■» <

1N4720

►51

s

\

-L

J

J

COMMON

> 51

+

510

t

, iy^ S

\ 1
1N4720

NEC
INPUT

1

J

A

3

2

15.0V

NOTE: C3 optional for improved ti
response and ripple rejectio

v (REGULATOR)

Ri + ?2_

«2

WHERE R 2 = 300« FOR SG120.5 AND SG120 5.2
R2 = 750UFORSG12012
R2 = lOOOnFOR SG120-15

NOTE: This circuit will allow each output to be adjusted approximately ±1 volt around its nominal
value. While there is some interaction in the adjustments, it is typically less than 10%. The linearity
of the adjustment is a function of the potentiometer resistance with lower values increasing the
linearity at the expense of power dissipation. The diodes protect the regulators from output polarity
reversal due to inadvertent overloads or variations in input voltage sequencing.

This same technique may be used with other voltages and/or regulators
adjusting the circuit values.

39

i the s<

js by. merely

7900 ELECTRICAL CHARACTERIST

CS(6

See Nc

>tes 1 I

12)

DEVICE TYPE

7905

7905.2

7908

7912

7915

Units

NOMINAL OUTPUT VOLTAGE

-5

-5.2

-8

-12

-15

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

-10

-10

-14

-19

-23

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C. I = 5 mA

-4.8

-5.2

-5.0

-5.4

-7.7

-8.3

-11.5

-12.5

-14.4

-15.6

Volts

Line Regulation

Tj = 25°C, l = 5 mA
AV||\j Range

5 50
(-7V<V| N <-25V)
I I

6 50
(-8V<V| N <-25V)
I

8
(-10.5V<V|N

80
^-25 V)

12
(-14.5V<V|n
1

120
^-30V)

15 150

(-17.5V<V, N <-35V)
I I

mV

Line Regulation

Tj = 25°C, Iq = 5 mA

I 5 I 25
(-8V<V| N <-12V)

I 6 I 25
(-9V<V|M<-12V)

I 8
(-11V<V| N <

40
-17V)

I 12 I 60
(-16V<V|N<-22V)

I 15 I 75
(-20V<V| N <-26V)

mV

Load Regulation
R, K -Package
T-Package (Note 3)

Tj = 250C

5mA<l <1.5A

5mA<» o ^500mA

15
5

50
25

20
6

60
30

12
4

80
40

28
8

120
60

30
10

150
75

mV
mV

Load Regulation
R, K-Package
T-Package (Note 3)

Tj = 25°C
250mA<l O <750mA
100mA<l O <250mA

15
5

25
15

20.
6

30
20

12
4

40
25

28
8

60
40

30
10

75
60

mV
mV

Total Output
Voltage Tolerance
P, R, K-Package
(T-Package) (Note 3)

(AIq Range)

5mA<lQ<1.0A, P<15W

(5 mA <l <200 mA, P <2W)

(-8V *
-4.75

^V, N <

-20V)
-5.25

(-9V
-4.95

<V, N <

-21V)
-5.45

(-11. 5\
-7.6

f <V|N <-23V)
-8.4

(-15.5V<V||m<-27V)
-11.4 -12.6

(-18.5V<V|m
-14.25

<-30V)
-15.75

Volts

Quiescent Current

Tj = 25°C

1

2

1

2

1

2

1.5

3

1.5

3

mA

Quiescent Current
Change

With Line AV|n Range
With Load Alo Range

1.3
•5

1 .3

.5

1.0
.5

1.0
.5

1.0
.5

mA
mA

Long Term Stability

1000 hours at Tj = 125°C

20

24

32

48

60

mV

Temperature Coefficient

Iq = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

mV/°C

Ripple Rejection

f = 120 Hz, AV| N = 10V

54

60

54

60

54

60

54

60

54

60

dB

Output Noise Voltage

Tj = 25°C, 10 Hz <f < 100 kHz

40

45

52

75

90

JtiVrms

Dropout Voltage

Tj = 250C, lo.= 1.0A (Note 3)

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj = 25°C (Note 5)

2.1

2.0

1.8

1.5

1.3

Amps

Peak Output Current

Tj - 25°C (Note 3)

2.5

2.5

2.5

2.5

2.2

Amps

Thermal Shutdown

Iq = 5 mA (Note 3)

175

175

175

175

175

OC

1 . Tj = -55°C to <+150°C, louT = 500 mA for R » p and K-Package and 100 mA for T-Package, unless otherwise noted.

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specifications at operating currents above 500 mA do not apply to T-Package.

4. AV||\| min. @ -55°C must maintain an input/output differential of 2.5V.

5. Short circuit protection is only assured over AV|n range.

7900C ELECTRICAL CHARACTERISTICS (See Notes 1 & 2)

DEVICE TYPE

7905C

7905.2C

7908C

7912C

791 5C

Units

NOMINAL OUTPUT VOLTAGE

-5

-5.2

-8

-12

-15

Volts

INPUT VOLTAGE (Unless Otherwise Noted)

-10

-11

-14

-19

-23

Volts

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

Output Voltage

Tj = 25°C, lo = 5 mA

-4.8

-5.2

-5.0

-5.4

-7.7

-8.3

-11.5

-12.5

-14.4

-15.6

Volts

Line Regulation

Tj = 25°C, lo = 5 mA
AV|N Range

3 100
(-7V<V|N<-25V)

6 100

(-8V<V| N <-25V)
I I

8

(-10.5V<V|N
J

160
<-25V)

12
(-14.5V<V| N
I

240
<-30V)

15
(-17.5V<V|N

300
<-30V)

mV

Line Regulation

Tj = 25°C, l = 5mA

I 3 I 50
<-8V<V iN <-12V)

I 6 I 100
(-9V<V|N<-12V)

J 8 I 80
(-11V<V|N<-17V)

I 12 I 120
(-16V<V|N<-22V)

i 15 I 150
(-20V<V| N <-26V)

mV

Load Regulation
P, R, K-Package
T-Package (Note 3)

Tj = 25<>C

5mA<lQ<1.5A

5mA<lo^500mA

15
5

100
50

20
6

100
50

24
7

160
80

28
8

240
120

30
10

300
150

mV
mV

Load Regulation
P, R, K-Package
T-Package (Note 3)

Tj - 25°C
250 mA <Iq <750 mA
100mA<l O <250mA

15
5

50
25

20
6

50
25

24

7

80
40

28
8

120
60

30
10

150
75

mV
mV

Total Output
Voltage Tolerance
P, R, K-Package
(T-Package) (Note 3)

(AIq Range)

5 mA <Iq <1 .0A, P <1 5W

(5 mA <l <200 mA, P <2W)

(-7V«
-4.75

£v, N <

-20V)
-5.25

(-9V
-4.95

^V| N <

-21 V)
-5.45

(-10.5
-7.6

<V| N <-23V)
-8.4

(-14.5V<V| N <-27V)
-11.4 -12.6

(-17.5V<V| N
-14.25

<-30V)
-15.75

Volts

Quiescent Current

Tj = 25°C

1

2

1

2

1

2

1.5

3

1.5

3

mA

Quiescent Current
Change

With Line AV|n Range
With Load AIq Range

1.3

.5

1.3
.5

1.0
.5

1.0
.5

1.0
.5

mA
> mA

Long Term Stability

1 000 hours at Tj = 1 25°C

20

24

32

48

60

mV

Temperature Coefficient

lO = 5 mA

-0.5

-0.5

-0.6

-0.8

-1.0

mV/°C

Ripple Rejection

f=120Hz, AV|N = 10V

54

60

54

60

54

60

54

60

54

60

dB

Output Noise Voltage

Tj = 25°C, 10 Hz <f <100 kHz

40

45

52

75

90

/iV rms

Dropout Voltage

Tj = 25°C, «o = 10A (Note 3)

2.0

2.0

2.0

2.0

2.0

Volts

Short Circuit Current

Tj=25°C(Note4)

2.1

2.0

1.8

1.5

1.3

Amps

Peak Output Current

Tj = 25°C (Note 3)

2.5

2.5

2.5

2.5

2.2

Amps

Thermal Shutdown

Iq = 5 mA (Note 3)

175

175

175

175

175

°c

1 . Tj = 0°C to +125°C, IquT = 500 mA f °r R . p * n <* K-Package and 100 mA for T-Package, unless otherwise noted.

2. All regulation tests are made at constant junction temperature with low duty-cycle pulse testing.

3. Specif ications at operatingcurrents above 500 mA do not apply to I -Package.

4. Short circuit protection is only assured over AVjfv, range.

OPERATIONAL AMPLIFIERS

General Purpose, Compensated Op Amps

General Purpose, Uncompensated Op Amps

Dual, Compensated Op Amps

Quad Op Amps

High Performance Op Amps

High Voltage Op Amps

Low Power Op Amps

Voltage Followers

42

Uncompensated Operational Amplifiers

SG101/201

The SG 101/201 are general purpose operational amplifiers. Features
include excellent input bias/current and drift characteristics plus short
circuit protection and pin compatibility with many industry-standard
operational amplifiers.

SG101A/201A/301A

The SG101A/201A/301A offer improved performance over the SG101/
201 operational amplifiers and also provide short circuit protection and pin
compatibility with industry standard types.

• Frequency compensated with a single capacitor — no resistor
required

• Low current drain: 1.8mA at ±20 V

• Continuous short circuit protection

• Operation as a comparator with differential inputs as high
as±30V

• No latch up when common mode range is exceeded

• 3mV offset voltage over temperature

• 100nA input current over temperature

• 20nA offset current over temperature

• Guaranteed drift characteristics

• Offsets guaranteed over full common mode range

PARAMETERS*

101

201

101A | 201A

301 A

UNITS

Supply Voltage

±5 to ±20

±5 to ±20

±5 to ±20

±5 to ±15

V

Operating Temperature Range

-55 to +125

to +70

-55 to +125

-25 to +85

to +70

°c

Package Types

T.Y.J, F

T,Y,J,F,N,M

T, Y, J,F

T,Y,J,

F,N,M

-

Input Offset Voltage

5.0

7.5

2.0 (3.0)

7.5 (10)

mV

Input Offset Current

200 (500)

500 (750)

10(20)

50 (70)

nA

Input Bias Current

0.5 (1.5)

1.5 (2.0)

0.075 (0.1)

0.25 (0.30)

M A

Temp Coeff Input Offset Voltage

(3.0 typ)

(6.0 typ)

15

30

juV/oC

Temp Coeff INput Offset Current

-

-

0.2

0.6

nA/°C

Large Signal Voltage Gain

50 (25)

20 (15)

50 (25)

25 (15)

V/mV

Common Mode Rejection

(70)

(65)

(80)

(80)

dB

Power Supply Rejection

(316)

(316)

(100)

(100)

juV/V

Input Common Mode Voltage Range

(±12)

(±12)

(+15,-12)

(+15,-12)

V

Differential Input Voltage

±30

±30

±30

±30

V

Slew Rate A v = 1 ,
A v = 10

0.2
3 (typ)

0.2

3 (typ)

0.2

3 (typ)

0.2

3 (typ)

V/juS

Unity Gain Bandwidth

0.5 (typ)

0.5 (typ)

0.5 (typ)

0.5 (typ)

MHz

Supply Current

3.0

3.0

3.0

3.0

mA

Vout RL = 2k"

±10

±10

±10

±10

V

R L = 10kft

±12

±12

±12

±12

V

Noise
R s = 1kn f = 10Hz to U)kHz

4

4

4

4

juV(rms)

R s = 500kn f = 10Hz to 10kHz

25

25

25

25

(typ)

*Para meters apply over supply voltage range and are mi
if enclosed in parentheses), unless otherwise indicated,

n./max. limits either at T A = 25°C (or over operating temperature range

SG101/201, SG101A/201A/301A Chip
(See T-package diagram for pad
functions)

Compensation and Optional
Balancing Circuit

CONNECTION DIAGRAMS

OUTPUT [l

v [7

COMPENSATION £

Top View
Minidip
MorY
Package

3V-.

71 OFFSET ADJUST/
il COMPENSATION

Feedforward Compensation

OFFSET ADJUST (T
OUTPUT (7

V + (T
COMPENSATION (7

NC(»

Fjv-

7J NON-INVERTING INPUT
7) INVERTING INPUT

h offset adjust/comp.
TJnc

Net?

OfFSETls
ADJUST L

OUTPUT0

V+ E

TOP VIEW
JorN
Package

COMPENSATION^

NC§3

NC|i«

n

H OFFSET ADJUST/
- 1 COMPENSATION

2JNC
3 NC

43

Voltage Followers

SG102/202/302

The SG 102/202/302 are high-gain operational amplifiers designed
specifically for unity-gain non-inverting voltage follower applications. The
devices incorporate advanced super-beta transistor processing techniques to
obtain very low input current and high input impedance. The input trans-
isters are operated at zero collector-base voltage to virtually eliminate high
temperature leakage currents resulting in extremely low input current and
low offset voltage drift.

• Low input bias current — 100 nA

• High input resistance - 10,OOOMJT2

• Internal frequency compensation

• Fast slewing - 10V/jUs - typ

• Simple offset balancing with 1k potentiometer

SG110/210/310

The SG 11 0/21 0/310 are high gain operational amplifiers internally
connected as unity-gain non-inverting amplifiers. Super-beta transistors are
used in the input stage to obtain extremely low bias currents without
sacrificing speed. These devices are directly interchangeable with the 101,
102, 741 and 709 in voltage follower applications. Internal frequency
compensation and offset balancing are provided. The SG110 family is
useful in fast sample and hold circuits, active filters or as general purpose
buffers.

• 10nA input current max over temperature

• 20MHz small signal bandwidth — typ

• 30V//ZS slew rate - typ

• ±5V to ± 18V supply voltage range

• No external frequency compensation necessary

PARAMETERS*

102

202

302

110

210

310

UNITS

Supply Voltage

±15

±15

±15

±5 to ±18

±5 to ±18

±5 to ±18

V

Operating Temperature Range

-55 to +125

-25 to +85

to +70

-55 to +125

-25 to +85

Oto+70

°c

Package Types

T,J, Y

T,J,M

,N, Y

T, J, Y

T,J,IV

,N,Y

Input Offset Voltage

5.0(7.5)

10(15)

15(20)

4.0 (6.0)

4.0 (6.0)

7.5 (10)

mV

Input Bias Current

10(100)

15(50)

30 (50)

3.0(10)

3.0 (10)

7.0(10)

nA

Temp Coeff Input Offset Voltage

6 (typ)

15 (typ)

20 (typ)

12 (typ)

6 (typ)

10 (typ)

MV/oc

Large Signal Voltage Gain

(0.999)

0.999

0.9985

0.999

0.999

0.999

V/V

Power Supply Rejection

60

60

60

70

70

70

dB

Input Common Mode Range

±10

±10

±10

±10

±10

±10

±10

Input Resistance

ioio

1010

109

1010

1010

1010

ft

Output Resistance

2.5

2.5

2.5

2.5

2.5

2.5

n

V os Adjust

IkftPot

IkftPot

IkftPot

IkftPot

IkfiPot

Ik^Pot

-

Slew Rate A v = 1

10 (typ)

10 (typ)

10 (typ)

30 (typ)

30 (typ)

30 (typ)

V/juS

Unity Gain Bandwidth (typ, MHz)

8 (typ)

8 (typ)

8 (typ)

12 (typ)

12 (typ)

12 (typ)

MHz

Supply Current

5.5

5.5

5.5

5.5

5.5

5.5

mA

Vout R L = 10kn

±10

±10 -

±10

±10

±10

±10

V

*Parameters apply over supply voltage range and are min./max. limits either at T A = 25°C (or over operating temperature range if enclosed in
parentheses), unless otherwise indicated.

Offset Balancing Circuit

R1
IK

FT

CONNECTION DIAGRAMS ° T

SG 102/202/302. SG110/210/310
Chip (See T-package diagram for
pad functions)

NC [i

3 nc

BOOSTER (i

£]V-

OUTPUT f«
BALANCE fj

TOP VIEW
Package

5] INPUT

*\ NC

T\ BALANCE

NC fa

[| NC

NC ^

n

7j NC

BOOSTER (5

Sv-

OUTPUT (6

v + (T

TOP VIEW
Minidip
Mor Y
Package

3] INPUT
2J NC

BALANCE jji

n

T) BALANCE

Increasing Negative Swing
Under load

'May be added to reduce
internal dissipation

44

General-Purpose Compensated Operational Amplifiers

SG107/207/307

The SG 107/207/307 offer excellent input
bias currents and drift characteristics as well as
short circuit protection and pin compatibility
with the 741 class of amplifiers.

• 3mV max offset voltage over
temperature

• 100 nA max input bias current
over temperature

• 20nA max offset current over
temperature

• Offsets guaranteed over full
common mode range

• Guaranteed drift characteristics

SG741/741C

SG741/741C are pin compatible with the
most widely accepted operational amplifiers
and provide excellent performance for a wide
range of applications.

• Complete short circuit protection

• Offset voltage null capability

• High common mode voltage range

• High differential input voltage range

SG1217/3217

These devices are identical to the SG741/
741 C types, except internal compensation is
reduced from 30pF to 3pF. Frequency response
is ten times that of the standard device.
Stability is unconditional from open loop to a
closed loop gain of 20dB. These devices are
especially useful in hybrid applications since
higher bandpass is achieved without an out-
board capacitor.

• Slew rate typically 5 V //usee

• 10 times frequency response 741/741C

• Ideal chip for hybrid applications

PARAMETERS*

107 | 207

307

741

741C

1217

3217

Units

Supply Voltage

±5 to ±20

±5 to ±20

±15

±15

±15

±15

V

Operating Temperature
Range

-55 to +125

-25 to +85

to +70

-55 to +125

to +70

-55 to +125

to +70

OC

Package Types (See Page 55)

T,J, F, Y

T,J,F,Y,M,N

T,J,F,Y

T,J,Y,F,M,N

T,J,F,Y

T,J,Y,F,M,N

-

Input Offset Voltage

2.0 (3.0)

7.5(10)

5.0 (6.0)

6.0 (7.5)

5.0 (6.0)

6.0 (7.5)

mV

Input Offset Current

10 (20)

50 (70)

200 (500)

200 (300)

200 (500)

200 (500)

nA

Input Bias Current

0.075(0.1)

0.25 (0.3)

0.5(1.5)

0.5 (0.8)

0.5(1.5)

0.5 (0.8)

UA

Temp. Coeff. Input Offset
Voltage

(15) 2

(30) 2

(3.0 typ)

(6.0 typ)

(3.0 typ)

(6.0 typ)

juV/oc

Temp. Coeff. Input Offset
Current

(0.2)

(0.6)

(0.5 typ)

(0.5 typ)

(0.5 typ)

(0.5 typ)

nA/oc

Large Signal Voltage Gain

50 (20)

25(15)

50 (25)

20(15)

50 (25)

20(15)

V/mV

Common Mode Rejection

(80)

(80)

(70)

70

(70)

70

dB

Power Supply Rejection

(100)

(100)

(150)

150

(150)

150

/uV/V

Input Common Mode Range

+15,-12

+15,-12

±12

±12

±12

±12

V

Differential Input Voltage

±30

±30

±30

±30

±30

±30

V

Unity Gain Bandwidth

0.5 (typ)

0.5 (typ)

0.8 (typ)

0.8 (typ)

0.8 (typ)

0.8 (typ)

MHz

Slew Rate

0.2

0.2

0.3

0.3

5.0 (typ) 3

5.0 (typ) 3

V/tfS

Supply Current

3.0

3.0

2.8

2.8

2.8

2.8

mA

Output Voltage Swing
R L = 2kft

±10

±10

±10

±10

±10

±10

V

R|_ = 10kO

±12

±12

±12

±12

V

Noise (typ)
R s = 1kfi
f = 10Hz to 10kHz

4

4

3

3

3

3

MV (rms)
(typ)

R s = 500kft

f = 10Hzto 10kHz

25

25

25

25

25

25

♦Parameters apply over supply voltage range and are min./max. limits either at T^
parentheses), unless otherwise indicated.

: 25°C (or over operating temperature range if enclosed in

+25°C < +125°C

Minimum recommended closed loop gain of 10.

OFFSET ADJUST \t

Ev-

OUTPUT [T

7) NON-INVERTING INPUT

V + [T

T °iat£ck W

J] INVERTING INPUT

ncQT

7] OFFSET ADJUST

NcHi

TJnc

NC [•

7]nc

OFFSET^
ADJUST L-

gv-

outputH;

TOP VIEW
JorN
Package

ri NON-INVERTING
U INPUT
71 INVERTING
zi INPUT

NC |ij

il OFFSET
-1 ADJUST

NC fa

J\ NC

NC[J4

n

T]nc

45

High Performance Operational Amplifiers

SG108/208/308 SG108A/208A/308A

SG1118/2118/3118 SG1118A/2118A/3118A

This series provides input currents and offset voltages which approach performance levels previously associated only with FET or chopper
stabilized amplifiers. Superior power supply rejection ratio allows use of unregulated supplies and internal short circuit protection makes appli-
cation nearly foolproof. Also, these devices feature low power consumption over a wide range of supply voltages. Frequency compensation for the
108 series is accomplished with a single external capacitor.

The SG1 1 18 types are internally compensated versions of the 108 devices. Since a 30pF capacitor is built into the chip, no external components
are needed for frequency compensation. In addition, provision is made for paralleling the internal capacitor making it possible to over-compensate to
increase stability margin. The "A" versions are high performance selections from the 108 and 1 1 18 types.

• Extremely low input bias currents

• Offset currents less than 1.0nA

• Guaranteed voltage and current drift characteristics

• 300/1 A power supply current

• Internal compensation on 1118/2118/3118 types

PARAMETERS* 1

108/1118 I 208/2118

308/3118

108A/1118A | 208A/2118A

308A/3118A

UNITS

Supply Voltage

±5 to ±20

±5 to ±15

±5 to ±20

±5 to ±15

V

Operating Temperature Range

-55 to +125

-25 to +85

to +70

-55 to +125

-25 to +85

to +70

°c

Package Types

J,Y,T,F

J, Y,T, F, M

J, Y,T, F

J, Y,T, F,M

-

Input Offset Voltage

2.0 (3.0)

7.5 (10)

0.5 (1.0)

0.5 (0.73)

mV

Input Offset Current

0.2 (0.4)

1.0(1.5)

0.2 (0.4)

1.0(1.5)

nA

Input Bias Current

2.0 (3.0)

7(10)

2.0 (3.0)

7(10)

nA

Temp Coeff Input Offset Voltage

(15)

(30)

(5.0)

(5.0)

juV/°C

Temp Coeff Input Offset Current

(2.5)

(10)

(2.5)

(10)

pA/°C

Large Signal Voltage Gain

50 (25)

25 (15)

80 (40)

80 (60)

V/mV

Common Mode Rejection

(85)

(80)

(96)

(96)

dB

Power Supply Rejection

(100)

(100)

(16)

(16)

iuV/V

Input Common Mode Range

(±13.5)

(±13.5)

(±13.5)

(±13.5)

V

Slew Rate A v = 1

0.1

0.1

0.1

0.1

v/mS

A v =10

3 (typ)

3 (typ)

3 (typ)

3 (typ)

Unity Gain Bandwidth

0.3 (typ)

0.3 (typ)

0.3 (typ)

0.3 (typ)

MHz

Supply Current

0.6

0.8

0.6

0.8

mA

Vout R L = 10kft

±13

±13

±13

±13

V

Noise
R s =1kft f = 10Hz to 10kHz

4

4

4

4

juV(rms)

R s = 500kft f = 1 0Hz to 1 0kHz

20

20

20

20

(typ)

♦Parameters apply over supply voltage range a
parentheses), unless otherwise indicated.

Inputs are shunted with back-to-back diodes
one volt is applied between the inputs unless

nd are min./max. limits either at T A = 25°C (or over operating temperature range if enclosed in

for overvoltage protection. Excessive current will flow if a differential input voltage in excess of
some limiting resistance is used.

CONNECTION DIAGRAMS

Compensation Circuits

Not required
for 1 1 1 8/1 1 1 8 A

NC |7
OUTPUT ji

v + (7

•FREQCOMPB

XL

gv-

T] FREQCOMPA

NC [•

NC [g

OUTPUT |ij

FREQCOMPB^

NC |u

v-E

OUTPUT (7

v + [T

FREQCOMPB H
FREQCOMPA (J£

XL

7j NC

-> NON-INVERTIf
U INPUT

r\ INVERTING
Zi INPUT

3]NC

FJ FREQCOMPA

7J NC

s]nc

4] non-inverting input

7] inverting input

D NC

TJnc

Quad Operational Amplifier

SG124/224/324

The SGI 24 series integrated circuit contains four true-differ-
ential, independent operational amplifiers. Each amplifier has
been designed to operate from either a single supply voltage or
plus and minus voltages and features internal frequency compen-
sation, high gain, and very low supply current requirements. An
additional significant advantage of these amplifiers is that when
using a single supply, the input and output can be operated down
to ground potential. Thus, they can be powered by a standard
46V DC logic supply and still be compatible with all forms of
logic inputs and outputs.

op amp* in a efngle

ABSOLUTE MAXIMUM RATINGS

euppJy vottege

Supply Voltage, V*

32Vqc or ±16Vrjc

Differential Input Voltage

32VQC

Input Voltage

-0.3VOC to +32Vdc

Power Dissipation (Note 1)

N Package (plastic)

600mW

Derate above 25°C

6.0mW/°C

J Package (cerdip)

lOOOmW

Derate above 2S°C

6.7mWS°C

Output Short-Circuit to Gnd (Note 2)

Continuous

V* <15V DC and T A = 25°C

Operating Temperature Range

SGI 24

-55°Cto +125QC

SG224

-25°Cto+e5°C

SG324

0«Cto+70°C

Storage Temperature Range

-6S°C to +150°C

Lead Temperature (Soldering. 60 sec)

300°C

Electrical Characteristics (V + =

t5V DC and Ta = 25°C unless otherwise noted!

Conditions

SG124

SG224/SG324

Parameter

Min.

Typ.

Max.

Min.

Typ.

Max.

Units

Input Offset Voltage

R S = 0ft

—

2

5

—

2

7

mVpc

Input Bias Current (Note 3)

•IN (+) or l|N (-)

~

45

300

—

45

500

nArjC

Input Offset Current

'IN (+) or l|N (-)

—

±3

±30

—

±5

±50

nAQC

Input Common-Mode Voltage
Range (Note 4)

—

V + ^l.5

—

V+^.5

VDC

Supply Current/

RL = °° On All Op Amps

—

0.8

2

--

0.8

2

mApC

Large Signal Voltage Gain

Rl_>2kfl

100

—

—

100

--

V/mV

Output Voltage Swing

R|_=2kfl

—

V+-4.5

—

V+-1.5

v D c

Common Mode Rejection
Ratio /

DC

—

85

—

—

85

—

dB

Power Supply Rejection
Ratio

DC

—

100

—

—

100

—

dB

Amplifier-to- Amplifier
Coupling

f = 1 kHz to 20 kHz
(Input Referred)

-120

-120

_

dB

Output Current Source

V| N + =+1V DC .V, N - =
0V DC

20

40

20

40

—

mApc

Output Current Sink

V| N - = +1 V DC ,V|N+ =
OVdc

10

20

—

10

20

—

mAQC

CONNECTION DIAGRAM

Note 1 : For operating at high temperatures, the SG324 must be
derated based on a +125°C maximum junction temperature and
a thermal resistance of 175°C/W which applies for the device
soldered in a printed circuit board, operating in a still air amb-
ient. The SG224 and SG124 can be derated based on a +150°C
maximum junction temperature.

Note 2: Short circuits from the output to V"*~ can cause ex-
cessive heating and eventual destruction. The maximum output
current is approximately 40 mA independent of the magnitude
of V + . At values of supply voltage in excess of +15Vqc, con-

tinuous short-circuits can exceed the power dissipation ratings
and cause eventual destruction.

Note 3: The destruction of the input current is out of the IC
due to the PNP input stage. This current is essentially con-
stant, independent of the state of the output so no loading
change exists on the input lines.

Note 4: The input common-mode voltage of either input signal
voltage should not be allowed to go negative by more than 0.3V.
The upper end of the common-mode voltage range is V+-1.5V,
but either or both inputs can go to +30Vqc without damage.

CHIP BONDING
DIAGRAM

APPLICATIONS INFORMATION

To reduce the power supply current drain, the amplifiers have a class put of the amplifier, a resistor should be used, from the output of the amp-

A output stage for small signal levels which converts to class B in a large lifier to ground to increase the class A bias currant and prevent crossover

signal mode. This allows the amplifiers to both source and sink large out- distortion. Where the load is directly coupled, as in DC applications, there

put currents. Therefore both NPN and PNP external currant boost tran- is no crossover distortion.

sjstors can be used to extend the power capability of the basic amplifiers. Capacitive loads which are applied directly to the output of the amp-

The output voltage needs to raise approximately 1 diode drop above (jfier (^j^ me i^ stability margin. Values of 50 pF can be eccommo-

ground to bias the orvehip vertical PNP transistor for output current sink- d^ ^n* the worst-case non-inverting unity gain connection. Large

For AC applications, where the load is capacitivefy coupled to the out- lance must be driven by the amplifier.

TTL INTERFACE

47

High Slew Rate Operational Amplifier

SG741S/SG741SC

The S6741S/741SC has been designed to provide a slew rate in excess
of 20 times that of the popular SG74.1 circuit and yet be fully interchange-
able in all other aspects. With input and output protection, internal com-
pensation, and single-component offset nulling, this amplifier has all the
features which have made the SG741 so easy to use. A guaranteed mini-
mum slew rate of 10 volts per microsecond maker this device ideally suited
for to A converters and all applications requiring greater power
bandwidth.

10 y/fis minimum slew rate

Internally compensated

Wide common mode and differential voltage

range

M, T, and Y Packages available

MAXIMUM RATINGS (Ta = +25°C unless otherwise noted)

H|^741Sl

Kga^B^H

Response Comparison. SG741S vs. SG741. 10HS/div., 5V/div.

I

Rating

SG741S

SG741SC

Unit

Power Supply Voltage

+22
-22

+18
-18

Vdc

Differential Input Signal Voltage

±30

Volts

Common-Mode Input Voltage Swing
(See Note 1 )

±15

Volts

Output Short-Circuit Duration
(See Note 2)

Continuous

Power Dissipation (Package
Limitation)
T-Package- -TO-99 Metal Can

Derate above Ta = +25°C
M-Package-Plastic Dual
In- Line Minidip
Derate above Ta = +25°C

680
4.6
625

5.0

mW

mW/°C

mW

mW/°C

Operating Temperature Range

-55 to +125 1 Oto+75

°C

Storage Temperature Range
T-Package
M-Package

-65 to +150
-55 to +125

°C

Note 1. For supply voltages less than ±15 Vdc, the absolute maximum

input voltage is equal to the supply voltage.
Note 2. Supply voltage equal to or less than 15 Vdc.

TYPICAL CHARACTER rSTICS
(V+ = +15 Vdc, V- = -15 Vdc, T A = +25°C unless otherwise noted.)

OPEN LOOP FREQUENCY RESPONSE

Slew Rate, 1 JiS/div.. 5V/div.

+20

! 111!

oluge

ii i

I

ftth

>

! !:

. Ii

I

L "^

* l0

■ III

!

| :

!

\J

i o

■ ! ! ! j ;:■ ■ ; ; ; i

8

■ !,; I i :

■ i

!

-

J

i ii ! i i ii

1 1

! |

!' I /li
ill V r

I i

III I ! !

100

+20

10 10 100, 1.0k

ELECTRICAL CHARACTERISTICS (V+ = +15 Vdc, V- = -15 Vdc, Ta = +25°C unless otherwise noted)

SG741S

SG741SC"

Characteristic

Min.

Typ.

Max.

Min.

Typ.

Max.

Unit

Power Bandwidth Ay = 1. R(_ - 2.0 kft. THD = 5%, Vq = 20 V(p-p)

150

200

-

150

200

-

kHz

Large-Signal Transient Response (Slew Rate)
V(-) to V(+)
V(+) to V(-)
Settling Time (to within 0.1%)

10
10

20
12
3.0

-

10
10

20
12
3.0

-

V//LCS
US

Small-Signal Transient Response (Gain = 1, Ej n = 20 mV)
Rise Time
Fall Time

Propagation Delay Time
Overshoot

-

0.25
0.25
0.25
20

_

~

0.25
0.25
0.25
20

-

/US

/is

Us

%

Short-Circuit Output Currents

±10

-

±35

±10

-

±35

mA

Open-Loop Voltage Gain (R L = 2.0 kQ. )
V ■ ±10 V, T A = +25°C
V - ±10 V, T A - T tow » to T hiah *

50,000
25,000

200,000

-

20.000
15.000

100.000

"

Output Impedance (f = 20 Hz)

-

75

-

-

75

-

n

Input Impedance (f = 20 Hz)

0.3

1.0

-

0.3

1.0

-

Mfi

Output Voltage Swing

R L =10kH. T A »+25°C
R L = 2.0kft,T A = +25°C
R L = 2.0 kft, T A = T, ow to T niqh

±12
±10
±10

*±14
±13

"

±12
±10
±10

±14
±13

:

v pk

Input Common-Mode Voltage Swing

±12

±13

-

±12

±13

-

Vpk

Common-Mode Rejection Ratio (f = 20 Hz)

70

90

-

70

90

-

dB

Input Bias Current
T A - +25°C
T A = T low

-

0.2
0.5

0.5
1.5

-

0.2

0.5
0.8

iUA

Input Offset Current
T A - +25°C
T A = T| ow to T ni q n

"

0.03

0.2
0.5

"

0.03

0.2
0.3

HA

Input Offset Voltage (Rs= < 10 kSZ)
T A - +25°C
T A = T low to T hiqh

"

1.0

5.0
6.0

"

2.0

6.0
7.5

mV

Average Temperature Coefficient of Input Offset Voltage
<Ta = T| 0w to Thigh)
R S - 50 SI
R S - 10 kft

"

3.0
6.0

-

-

3.0
6.0

-

/7V/°C

Average Temperature Coefficient of Input Offset Current
<T*A • T|ow to T n jQ h )

_

30

_

_

30

_

nA/°C

DC Power Dissipation (Power Supply = ±15 V. Vo = 0)

-

30

85

-

30

85

mW

Positive Voltage Supply Sensitivity (V— constant)

-

2.0

150

-

2.0

150

MV/V

Negative Voltage Supply Sensitivity (V+ constant)

-

10

150

-

10

150

/iV/V

iSitee

CONNECTION DIAGRAMS

gv-

INVENTING
INPUT
j] OFFSET

limited temperatui

Dual Compensated Operational Amplifiers

SG747/747C

SG1558/1458

The SG747/747C are dual operational amplifiers offering performance
which is identical to that of the 741/741 C.

• Complete short circuit protection

• Offset voltage null capability

• High common mode voltage range

• High differential input voltage range

SGI 558/1458 are internally compensated dual operational amplifiers
intended for a wide range of analog applications where board space and/or
weight are important High common mode voltage range and absence of
"latch-up" make these devices ideal for use as voltage followers. High gam
and wide operating voltage range provide superior performance in
integrator, summing amplifier and general feedback applications.

• Short-circuit protected

• 6dB/octave roll-off

PARAMETERS*

747 2 ' 5

747C 2 ' S

1558 2

1458 2

1458C 2

Units

Supply Voltage

±15

±15

±15

±15

±15

V

Operating Temperature Range

-55 to +125

to +70

-55 to +125

0to75

0to75

OC

Package Types

T,J, N

T,M

-

Input Offset Voltage

5.0 (6.0)

6.0 (7.5)

5.0 (6.0)

6.0 (7.5)

10.0(12.0)

mV

Input Offset Current

200 (500)

200 (300)

200 (500)

200(300)

300(400)

nA

Input Bias Current

0.5(1.5)

0.5 (0.8)

0.5(1.5)

03 (0.8)

0.7(1.0)

MA

Temp Coeff Input Offset Voltage

(3.0 typ)

(6.0 typ)

(3.0 typ)

(6.0 typ)

(6.0 typ)

j*V/°C

Temp Coeff Input Offset Current

(0.5 typ)

0.5 typ)

(0.5 typ)

(0.5 typ)

(0.5 typ)

nA/<>C

Large Signal Voltage Gain

50 (25) 3

20 (15) 3

50 (25) 3

20 (15) 3

20 (15) 4

V/mV

Common Mode Rejection

(70)

70

(70)

70

60

dB

Power Supply Rejection

(150)

150

(150)

150

30tvo

mV/V

Input Common Mode Range

±12*

±12*

±12*

±12 !

±11*

V

Differential Input Voltage

±30

±30

±30

±30

±30

V

Unity Gain Bandwidth

0.8 (typ)

0.8 (typ)

OB (typ)

0.8 (typ)

0.8 (typ)

MHz

Slew Rate

0.3

0.3

0.3

0.3

0.3

V/jiS

Supply Current

2.8 2

2.8 2

23 2

2.8'

4.0 2

mA

Output Voltage Swing R(_ = 2kft

±10

±10

±10

±10

±9

V

R L - 10kft

±12

±12

±12

±11

V

Noise
R s =1kn f = 10Hz to 10kHz

3 (typ)

3 (typ)

3 (typ)

3 (typ)

3 (typ)

uV(rms)

R s = 500k« f=10Hz to 10kHz

25 (typ)

25 (typ)

25 (typ)

25 (typ)

25 (typ)

♦Parameters apply over supply voltage range and are min./max. limits either
parentheses), unless otherwise indicated.

1 V s = A15V 2 Each half 3 R L = 2k 4 R L = 10k

at Ta = 25°C (or over operating temperature range if enclosed in
V + A and V + B are internally connected

Balancing Circuit (optional)
(J or N Package only)

SG747/747C Chip (See 747J-Package for
pad functions)

SQ1558/1458 Chip (See 1558 M-Package for
pad functions)

NON-INVERTING
INPUT A
INVERTIN6

CONNECTION DIAGRAMS

NON-INVERTING

49

Uncompensated Operational Amplifiers

SG748/748C

SG777/777C

The SG748/748C are high performance devices which are similar to the
741/741C but without internal compensation. The 748/748C are func-
tional and pin for pin replacements for the 301 A and 201 type operational
amplifiers.

The SG777/777C are precision operational amplifiers featuring low
input offset current and low bias current. This device is available in most
popular package styles, including minidip.

• Complete short circuit protection

• Offset voltage null capability

• High common mode voltage range

• High differential input voltage range

• Available in minidip

• Low input bias current — 25nA

• Low input offset current — 3nA

• Low input offset voltage — 2mV

• Low offset voltage and current drift

• Short circuit protection

PARAMETERS*

748

748C

777

777C

UNITS

Supply Voltage

±15

±15

±15

±15

V

Operating Temperature Range

-55 to +125

to +70

-55 to +125

to +70

OC

Package Types

T,J, F, Y

T,J, F, Y,N,M

'T, J, F, Y

T,Y,J, F,N,M

-

Input Offset Voltage

5.0 (6.0)

6.0 (7.5)

2.0 (3.0)

(5.0)

mV

Input Offset Current

200 (500)

200 (300)

3.0(10.0)

20 (40)

nA

Input Bias Current

500(1500)

500 (800)

25 (75)

100(200)

nA

Temp Coeff Input Offset Voltage

(3.0 typ)

(6.0 typ)

15

30

JLlV/OC

Temp Coeff Input Offset Current

(0.5 typ)

(0.5 typ)

0.15

0.6

nA/QC

Large Signal Voltage Gain

50 (25)

25(15)

50 (25)

25(15)

V/mV

Common Mode Rejection

(70)

70

(80)

(70)

dB

Power Supply Rejection

(150)

150

(100)

(150)

juV/V

Input Common Mode Voltage Range

±12

±12

(±12)

(±12)

V

Differential Input Voltage

±30

±30

±30

±30

V

Slew Rate A v = 1,

0.3

0.3

0.5 (typ)

0.5 (typ)

A v =10

3 (typ)

3 (typ)

5.5 (typ)

5.5 (typ)

V/juS

Unity Gain Bandwidth (typ)

0.8

0.8

0.5

0.5

MHz

Supply Current

2.8

2.8

2.8

2.8

mA

V ou t «L= 2kft

(±10)

±10

(±10)

(±10)

V

R|_= 10kn

(±12)

(±12)

(±12)

V

Noise

R s =1kft f = 10Hz to 10kHz

4

4

4

4

juV(rms)

R s =500kft f = 10Hz to 10kHz

25

25

25

25

typ

♦Parameters apply over supply voltage range
enclosed in parentheses), unless otherwise i

and are min./max. limits
ndicated.

either at T A = 25°C (or over operating temperature range if

CONNECTION DIAGRAMS

OUTPUT (i

V+ (?

COMPENSATION (V

H

gv-

I NON-INVERTING

I INPUT

I INVERTING

I INPUT

l OFFSET ADJUST/

OFFSET ADJUST [[
OUTPUT [7

v + d

COMPENSATION [»
NC(j«

gv-

7] non-inverting input '
7] inverting input
h offset adjust/comp.
TJnc

50

Compensation
and Optional
Balancing Circuit

Low Power Operational Amplifiers

SG1250/2250/3250

The SG 1250/2250/3250 operational amplifiers are designed to offer
exceptional performance under conditions of extremely low internal power
consumption. Since the quiescent current is determined by a single
external resistor, operation over a wide range of currents and voltages is
possible.

This device is similar to the juA 776/776C and is frequently a desirable
replacement due to its superior performance.

• Adjustable power consumption to less than 20JUW

• Supply voltages from ±0.75 to ±18V

SG4250/4250C

The SG4250/4250C are intended for applications requiring extremely
low internal power consumption. The device is pin compatible with the
741 type operational amplifiers and is an exact replacement for the
industry standard 4250/42500.

• ±1V to ± 18V power supply operation

• 20/UW standby power consumption

• 5nA input bias current

• 35nVyHz input noise voltage (typ)

• Internally compensated

PARAMETERS/CONDITIONS

1250 1

2250 1

3250 l

4250 2

4250C 2

UNITS

Operating Temperature Range

-55 to +125

0to70

0to70

-55 to +125

to +70

oc

Supply Voltage

±18

Differential Input Voltage 3

±15

Common Mode Range

±15

Package Types

T, Y

T,Y,M

T.Y

T,Y,M

RS< lOOKft
Input Offset Voltage

Rs < 10Kft

3(4)

3(4)

6.0 (7.5)

3(4)

7.5

mV

o- n V S = ±3V
Input Bias Current

Vs = ±15V

18 (20)
12(15)

18 (20)
12(15)

40 (50)
25 (30)

(15) 2

30(50) 2

nA

Input Offset Current

5(8)

5(8)

10(15)

(5)

10(15)

nA

Input Resistance

3

3

3

3

3

Mn

Vc = ±3V
Large Signal Voltage Gain R[_ = 10Kft

Vs = ± 1 5V

40 (25)
AOO (50)

40 (25)
100 (50)

40 (25)
75 (50)

100 (50) 2

75 (50) 2

V/mV ,

o • V S = ±3V, R L =10Kft
Output Voltage Swing

H M a V S = ±15V, R L =10K«

±1.5 (±1.0)
±11 (±10)

±11 (±10j 2

±11 2

V

CMRR Rs< 10Kft

(70)

(70)

(70)

(70)

(70)

dB

Vc = ±3V
PSRR Re < 10KI2 *

a V S = ±15V

(200)
(150)

(200)
(150)

(200)
(150)

(150) 2

(150) 2

MV/V

Vc = ±3V
Power Consumption , Ri =
Vs = ±15V ■

(240)
(1200)

(240)
(1200)

(240)
(1200)

(480) 2

(600) 2

MW

Average TC of Offset Voltage R S = 10K (±15V for 1250)

4 (typ)

4 (typ)

6 (typ)

5 (typ)

5(typ)

*iV/°C

Average TC of Offset Current Rs = 10K (±15V for 1250)

2 (typ)

2 (typ)

1 (typ)

1.7 (typ)

1 (typ)

pA/°C

Equiv. Input Noise Voltage f = 10Hz (±15V for 1250)

35 (typ)

35 (typ)

35 (typ)

35 (typ)

35 (typ)

nV/y^z

Equiv. Input Noise Current f = 10Hz (±15V for 1250)

0.5 (typ)

0.5 (typ)

0.5 (typ)

0.5 (typ)

0.5 (typ)

pA//Hz

Slew Rate R|_ = 20K, C L = 100pF

0.2 (typ)

0.2 (typ)

0.2 (typ)

0.16 (typ)

0.16 (typ)

V/mS

Small Signal Unity Gain-Bandwidth, Rf = O,
V jn » 20m V. R L = 20Kfi

-

-

-

250 (typ)

250 (typ)

kHz

Parameters for 1250/2250/3250 are min/max limits either at T^ = 25°C (or over operating temperature range if enclosed in parentheses),
for supply voltage of .±.3V to Jl15V and for a quiescent current of 30 jliA established by an R^t of 1.1 M£2 for V s jt3V and 7.5 MSI for

Parameters for 4250/4250C are min/max limits either at T A
supply voltage of jfc6V and quiescent current of 30 /LtA.

Not to exceed either supply voltage

SETTING' QUIESCENT CURRENT

RESISTOR BIASING

: 25°C (or over operating temperature range if enclosed in parentheses), for

v s

QUIESCENT CURRENT

10JUA

30JUA

100/UA

300JUA

±1.5

1.5MS2

470k£2

150k£2

±3

3.3M12

1.1M£2

330k£2

100k£2

±6

7.5M12

2JMQ,

750k£2

220k£2

±9

13M12

4MS2

1.3M&2

350k£2

±12

18lvtf2

5.6M12

1.5MJ2

510k£2

±15

22M12

7.5M£2

2.2M&

620k£2

CURRENT SOURCE BIASING

«Q
Iset

lOjUA
1.3JUA

30jUA

4JUA

100/UA

15/LlA

300jUA

50jUA

CONNECTION DIAGRAMS

ADJUST
OUTPUT (t

Rset([

TOP VIEW
Minidip
MorY

gv.

n

51

General-Purpose Compensated Operational Amplifiers

SG1536/1436 /1436C

SGI 536/1 436/1 436 C are intended specifically for use in high voltage
applications where high common mode input ranges, high output voltage
swings and low input currents are required. These devices are internally
compensated and are pin compatible with industry-standard operational
amplifiers.

Usable with up to ±40V supplies
Provides up to ±30V output voltage swing
Common mode voltages to ±24V
Input current 35nA max over temperature

SG1556/1456/1456C

This series offers excellent input characteristics plus a five-times
improvement in slew rate over conventional amplifiers.

Low bias current 15nA max

Low input offset voltage 4.0m V max

Fast slew rate 2.5V/jus typical

Low power consumption 45mW max

Output short circuit protection

PARAMETERS*

1536 1

1436 1

1436C 1

1556

1456

1456C

UNITS

Supply Voltage

±40

±34

±30

±15

±15

±15

V

Operating Temperature Range

-55 to +125

to +75

to +75

-55 to +125

to +75

to +75

°C

Package Types

T, Y

T, Y

-

Input Offset Voltage

5.0 (7.0)

10

12

4.0 (6.0)

10(14)

12

mV

Input Offset Current

3.0 (7.0)

10(14)

25

2.0(5.0)

10(14)

30

nA

Input Bias Current

20 (35)

40(55)

90

15 (30)

30(40)

90

nA

Large Signal Voltage Gain

100(50)

70(50)

50

100(40)

70(40)

25*

V/mV

Common Mode Rejection

80

70

50

80

70

110 (typ)

dB

Power Supply Rejection

100

200

50

100

200

75 (typ)

/xV/V

Input Common Mode Range

±24

±22

±18

±12

±11

±10.5

V

Differential Input Voltage (V)

±(V + + |V-|-3V)

iV s

±v s

±v s

V

Unity Gain Bandwidth

1.0 (typ)

1 .0 (typ)

1.0 (typ)

1.0 (typ)

1 .0 (typ)

1.0 (typ)

MHz

Slew Rate

2.0 (typ)

2.0 (typ)

2.0 (typ)

2.5 (typ)

2.5 (typ)

2.5 (typ)

V/mS

Supply Current

4.0

5.0

5.0

1.5

3.0

4.0

mA

Output Voltage Swing Rl * 2kft

±22 T

±20 '

±20 l

±12

±11

±10

V

R L = 10k«

±30 5

-

-

-

-

-

V

Noise (typ)
Aw ■- 100, R s = 10k«. f - 1 .0 KHz.
BW- 1.0Hz

50

50

50

45

45

45

nV/(Hz) 1 /*
(typ)

* Parameters apply over supply voltage range and are min./max. limits either at T^ = 25°C (or over operating temperature range i
enclosed in parentheses), unless otherwise indicated.

' V s = JL15V

Inputs are shunted with back-to-back diodes for over voltage protection

R L = 5 k£l

R L = 5.0kfl, V s = A36V.

CONNECTION DIAGRAMS

ADJUST
OUTPUT (i

*(i

NC (l

TOP VIEW
Mlnidlp
MorY

ri NON-INVERTING
i! INPUT +

ri INVERTING
D INPUT -

71 OFFSET
^ ADJUST

SG1536/1436/1436C Chip (See T-packaoa diagram
for pad functions)

SG1556/1456/1456C Chip

(See T-package diagram for pad functions)

Balancing Circuit (Optional)

52

High Performance Operational Amplifiers

SG1660

SG1760

The SG1660 is a superior, functional, and pin for pin, replacement for
the 301 A, 748C and 201 operational amplifiers. The SG1660 is also
frequently a desirable replacement for the 308/308A types due to its lower
cost.

The SG 1760 is an internally compensated version of the SGI 660 and is
a superior replacement for the 307 and 741 type op amps.

• 15nA input bias current

• 2.0nA input offset current

• Low power — 7.5mW (typ)

• CMRRof80dB

• PSRRof80dB

• Available in minidip

15 nA input bias current
2.0 nA input offset current
Low power — 7.5 mW (typ)
CMRR of 80 dB
PSRR of 80 dB
Available in minidip

Compensation Circuit

PARAMETERS*

1660

1760

UNITS

Supply Voltage

±5 to ±15

±5 to ±15

V

Operating Temperature Range

to +70

to +70

oc

Package Types

T, J, M, Y, F

-

Input Offset Voltage

7.5 (10.0)

7.5 (10.0)

mV

Input Offset Current

2.0 (4)

2.0 (4)

nA

Input Bias Current

15 (25)

15(25)

nA

Temp Coeff. Input Offset Voltage

30

30

mV/oc

Temp Coeff. Input Offset Current

0.04

0.04

nV/<>C

Large Signal Voltage Gain

25(15)*

25(15)*

V/mV

Common Mode Rejection

(80)

(80)

dB

Power Supply Rejection

(80)

(80)

mV/V

Input Common Mode Voltage Range

(±13.5) 3

(±13.5) 3

V

Differential Input Voltage

±1 4

±1 4

V

o. « A " = !'

0.1

0.1

v/ M s

A v = 10

1 (typ)

1 (typ)

Unity Gain Bandwidth

0.3 (typ)

0.3 (typ)

MHz

Supply Current

0.75 2

0.75 2

mA

v out R L =10kfi

±13

±13

V

Noise

R s =1kft f = 10Hz to 10kHz

4

4

juV(rms)

R s « 500kf2 f = 10Hz to 10kHz

20

20

(typ)

♦Parameters apply over supply voltage range and are min./max. limits either at
1"a - 25°C (or over operating temperature range if enclosed in parentheses),
unless otherwise indicated.

Rl

= lOktl, V s -
Jil5V

tl5V, V out = A10V 2 T A = 70°C (1000 MA at 0°C)

Inputs are shunted with back-to-back diodes for overvoltage protection.

CONNECTION DIAGRAMS

SGI 660 Chip (See T-package diagram
for pad functions)

SG1760 Chip (See T-package diagram
for pad functions)

(not required for 1 760)

OUTPUT [•

freocompb[>

n

3v-

i| NON-INVERTING
J INPUT
Ti INVERTING
3 INPUT

TJ FREQC0MPA

v-[T

OUTPUT (7
V + (T

freocompbU

FREQCOMPA|i«

I] NON-INVERTING INPUT

Hi.

D NC

3nc

53

INTERFACE CIRCUITS

Line Drivers
Line Receivers
Quad Line Receivers
Quad Bus Receivers
Quad Bus Tranceivers
Voltage Comparators
Quad Comparators
Dual Peripheral Drivers

54

Voltage Comparators

SGlll/211/311

The SG1 11/21 1/311 are medium speed, high input impedance devices
which are especially well suited for use in level detection and low level
voltage sensing applications. Operation may be obtained from supply
voltages ranging from ±15V down to a single +5V source.

The output, an open collector NPN capable of switching 50V and
50mA, can drive RTL, DTL, TTL, MOS logic, relays or lamps. Both input
and output can be isolated from ground and the output can drive loads
referred to a positive supply, ground or a negative supply. These devices
also offer offset balance, strobe capability and pin configuration of the
SG710 Comparator.

• Differential input voltage range of ±30V

• 150nA maximum bias current

• Consumes 135mW at ±15V

PARAMETERS*

111

211

311

UNITS

Operating Temperature Range

-55 to +125

-25 to +85

to +70

PC

Package Types

T,J

T, J

, M

Supply Voltage

±15

V

Input Offset Voltage Rs < 50k

3 (4.0) 2

7.5 (10.0) 2

mV

Input Offset Current

10 (20) 2

50 (70) 2

nA

Input Bias Current

100(150)

250 (300)

nA

Voltage Gain

200 (typ)

200 (typ)

V/mV

Response Time 1

200 (typ)

200 (typ)

nS

Saturation Voltage Isjpk = 50 mA

V + = 4.5V

Uink = 8 mA
v- = OV smK

1.5
0.4

1.5
0.4

V
V

Output Leakage Current

10(500)

50

nA

Differential Input Voltage max

±30

±30

V

Total Supply Voltage, Vg4 max

36

36

V

Input Voltage Range

±14 (typ)

±14 (typ)

V

Positive Supply Current

6.0

7.5

mA

Negative Supply Current

5.0

5.0

mA

Output Voltage, V74

50 3

40 3

V

♦Parameters apply over supply voltage range and are min./max. limits either at T^ = 25°C
(or over operating temperature range if enclosed in parentheses), unless otherwise indicated.

The response time specified is for a lOOmV input step with 5mV overdrive.

The offset voltages and offset currents given are the maximum values required to drive the
output down to IV or up to 14V with 1mA load.
3
Output voltage levels can be changed for compatibility with DTL and T2L logic levels.

SG1 11/21 1/311 Chip (See
T-package diagram for pad
functions)

CONNECTION DIAGRAMS

COLLECTOR [i
OUTPUT M

NC £

nc m

NC £
NC £

TOP VIEW
JorN
Package

3 BALANCE

Ev-

3 NC

71 INVERTING
J INPUT

3] NON-INVERTING
- 1 INPUT

7J GNO/EMITTER
J OUTPUT

3nc ■

BALANCE js

COLLECTOR |7
OUTPUT L

■ E

TOP VIEW

INPUT

71 GND/EMITTER
-U OUTPUT

55

Quad Comparators

SG139/239/339 SG139A/239A/339A / SG3302*

The S6139 scries describes a monolithic IC containing four inde-
pendent voltage comparators designed to provide maximum utility and
versatility in a single package. Unique features of this device include the
ability to operate with either a single or dual-polarity power supply and
a common-mode voltage range including ground, even when using a single
supply voltage. Additionally, the open-collector output stage provides
easy interfacing with all types of logic circuitry.

• Wide supply voltage range: 2 to 36 volts or
±1 to ±18 volts.

• Low supply current (0.8 mA) insensitive to
supply voltage.

• Inj&ut bias current of 25 nA typically.

• Compare voltages at ground common mode.

• Output compatible with DTL. TTL, ECL.
MOS, and CMOS Logic.

ELECTRICAL CHARACTERISTICS (T A = 250C, see Note 3)

ABSOLUTE MAXIMUM RATINGS

Differential Input Voltage
input Voltage Range (Mote 1)
Input Current (V |N <-0.3Vdct
Output Sink Current
Power Dissipation

*2$°C

Derate above 25°C
Output Short Circuit to Gnd (Note 2)
Operating Temperature Range
SG139<J-pkgomy)

Storage Temperature Range

Lead Temperature (Soldering. 10 sec.)

+36Vor±18V
36V

-0.3V to +36V
50mA
20mA

600mW

6.0mW/<»C

lOOOmW

6.7mW/°C

Continuous

-65°Cto+125°C

-25°C to +85°C

0°Cto+70°C

-65°Cto+150°C

300°C

CONNECTION DIAGRAM

Conditions

SG139
SG139A

SG239/339
SG239A/339A

Parameter

Min.

Typ.

Max.

Min.

Typ.

Max.

Units

Input Offset Voltage

At Output Switch Point,
Vrj&! 1.4Vdc.Vref =
+1.4VocandRs = 0S2

±2.0

±5.0

±2.0

±5.0

mVQC

*"A" Versions

±2.0

±2.0

mVpc

Input Bias Current (Note 4)

!|N(+) or l|N(-) With Output
in Linear Range

25

100

25

250

nAQC

Input Offset Current

»IN(+) - 'IN(-)

±3.0

±25

±5.0

±50

nAQC

Input Common-Mode Voltage
Range (Note 1)

V+-1.5

V+-1.5

vdc

Supply Current

R L = oo On Ail Comparators

0.8

2.0

0.8

2.0

mAoc

Voltage Gain

R L > 15kft

200

200

V/mV

Large Signal Response Time

V|(s| = TTL Logic Swing,
VREF=+1.4V DC ,VRL =
5.0V DC andR L = 5.1kn

300

300

ns

Response Time (Note 5)

Vrl= 5.0VocandRL =
5.1 kS2

1.3

1.3

Ms

Output Sink Current

V|N(-)>+1.0V DC .V|N(+) =
and Vo<+15Vqc

6

16

6

16

mApC

Saturation Voltage

V| N (.)>+1.0V D C.V|N(+)=0
and IsiNK^ 4.0 mA

250

500

250

500

mVQC

Output Leakage Current

V|N(+) >+ 10 V DC , V|N(-) =
and VquT = 5.0 Vqc

0.1

0.1

nAoC

Ta = Operating Temperature Range

Input Offset Voltage

At Output Switch Point, Vfj S
1.4 Vqc. VreF = +1.4 Vdc and
R S = 0fi

+9.0

+9.0

mVDC

Input Offset Current

l|N(+)-l|N(-)

±100

±150

nADC

Input Bias Current

l|N(+) or 'lN(-) With Output in
Linear Range

300

400

nA D C

Input Common-Mode Voltage
Range

V+-2.0

V+-2.0

v D c

Saturation Voltage

V|N(-)^+1.0V DC .V|N(+) =
and IsiNK ^ 4.0 mA

700

700

mVoc

Output Leakage Current

Vin(+) > + io vdc. vin(-) = o

and VoUT = 30 Vqc

1.0

1.0

madc

Differential Input Voltage

KeepAIIV| N 's>OVDC(or
V-, if used)

36

36

vdc

irator gam more than 0.3 volt volts for

__^ is on causing high input current S6139A,

d possible faulty outputs. This condition is not destructive providing Note 4:

• tne input current Is limited to less then 50 mA. „ PNP inpt

Note 2: Short circuits from the output to V+ can c

the SQ139. 239. and '3391 and V <

239A, and 339A.'

The direction of the input current ii

it of the IC due t<

t the output so no loading change exists on the reference or

Note 3: Unlets otherwise stated t

♦ Contact factory for 3302 test limits.

APPLICATIONS INFORMATION

These comparators are high gain, wide bandwidth devices; which,
like moat circuits of this type, can easily oscillate with stray feedback
paths from output to input. This only occurs during the output voltage
transition intervals as the comparator changes state and can be mini-
mized by reducing the value of the input resistors to less than 10k&,
using P.C. board wiring rather than sockets, or providing a small
amount of positive feedback to cause rapid transitions. Power supply
bypassing is not normally required with this circuit.

All pins of any unused comparators should be grounded.

The differential input voltage may be larger than V+ without caus-
ing damage but if negative excursions greater than -0.3 volt are possible,
protection should be provided by a clamp diode and/or input resistor.

The output of this comparator is an uncommitted collector of a
grounded-emitter NPN transistor. Several collectors may be tied
together to provide a* wired-OR function. An output pull-up resistor
can be connected to any available power supply voltage up to 36 volts
with respect to the GNO terminal, regardless of the voltage level applied
to the V+ terminal. The output can also be used as a simple SPST
switch to ground when no pull-up resistor is used.

The amount of current which the output transistor can sink is
limited by its drive to about 16 mA. Exceeding this current will cause.
the transistor to come out of saturation and the output voltage will

rise very rapidly. The amount of saturation voltage is determined by
the rsa t of the output transistor which is approximately 60 ohms.

MOS TO TTL TO MOS LEVEL SHIFT

Voltage Comparators

SG710/710C

SG711/711C

The SG710/710C are high-speed voltage comparators designed for use
in level detection, low-level sensing and memory applications. Inherent,
component matching provides low offset voltage and drift as well as high
accuracy and fast response. The output of the comparator is compatible
with all forms of saturating logic.

The S6711/S6711C are dual voltage comparators designed for use in
core-memory sense amplifier applications, pulse height detectors, and as a
double-ended limit sensor for automatic go/no-go test equipment. Inherent
component matching provides low offset voltage and drift as well as high
accuracy and fast response. With an output compatible with all forms of
saturation logic, the device also has provisions for independent strobing of
each comparator channel.

PARAMETERS*

710

710C

711 3

71 1C 3

UNITS

Operating Temperature Range

-55 to +125

to +70

-55 to +125

to +70

°c

Package Types

T, J, N

T, J,N

-

Supply Voltage (max)

+14.0, -7.0

+14.0. -7.0

+14.0, -7.0

+14.0, -7.0

V

Input Offset Voltage 2

2.0 (3.0)

5.0 (6.5)

3.5 (6.0)

5.0 (10)

mV

Input Offset Current 2

3.0 (7.0)

5.0 (7.5)

10 (20)

15(25)

MA

Input Bias Current

20 (45)

25(40)

75(150)

100(150)

ma

Voltage Gain

1250(1000)

1000 (800)

750 (500)

700 (500)

V/V

Response Time (typ)

40 (typ)

40 (typ)

60 (max)

40 (typ)

nS

Differential Input Voltage

±5.0

±5.0

±5.0

±5.0

V

Output Sink Current

2.0 (0.5)

1.6(0.5)

0.5

0.5

mA

Positive Output Voltage

2.5/4.0

2.5/4.0

2.5/5.0

2.5/5.0

V

Negative Output Voltage

-1.0/0

-1.0/0

-1.0/0

-1 .0/0

V

Input Common Mode Range

±5.0

±5.0

±5.0

±5.0

V

Common Mode Rejection Ratio

80

70

-

-

dB

Power Supply Current

9.0

9.0

10.0

7.2 (typ)

mA

Power Consumption

150

150

150

150

mW

Strobe Current

-

-

2.5

2.5

mA

♦Parameters apply over supply voltage range and are min./max. limits either at T A = 25°C (or over operating
temperature range if enclosed in parentheses), unless otherwise indicated.

The response time specified is for a lOOmv input step with 5mV overdrive.

The offset voltages and offset currents given are the maximum values required to drive the output to 1.4Vdc at
25°C, 1.8Vdc at 0° or — 55°C, l.OVdc at +70° or 125°C.

Each comparator.

CONNECTION DIAGRAMS

SG710/710C

SG710/710C Chip
(See T-package dia-
gram for pad functions)

NC (•

OUTPUT [«

NC |»

TOP VIEW
V+ Si JorN
Package

NC Fj
Nc£
NC £

H

SG711/711C

3nc

s] NC

7\ INVERTING
" INPUT

j\ NON-INVERTING
J INPUT

2] GNO
7] NC

SG711/711CChip
(See T-package diagram
for pad functions)

NC (•
STROBE 2 H
OUTPUT fj

V+ EJ

GND [«

STROBE 1 ||3

Nc£

TOP VIEW
J or N
Package

3nc

3v-

INPUT 1
t] NC

57

Line Drivers

SG1488

The SG1488 is a monolithic quad line driver designed to interface data
terminal equipment with data communications equipment in conformance
with the specifications of EIA Standard No. RS-232C.

Current limited output

10mA typ
Power-Off source impedance

300 ohms minimum
Simple slew rate control with

external capacitor
Flexible operating supply range
Compatible with all DTL and

TTL logic families

PARAMETERS*

1488

UNITS

Supply Voltage (max, Ta = 25°C)

+15,-15

V

Input Signal Voltage (max, Ta = 25°C)

-15 < V in < 7.0

V

Output Signal Voltage (max, Ta = 25°C)

±15

V

Package Types

J

-

Operating Temperature Range

to +75

OC

Forward Input Current (Vj n = Vdc)

1.6

mA

Reverse Input Current (Vj n = +5.0 Vdc)

10

MA

Output Voltage High

(V jn = 0.8 Vdc, R L = 3.0kft, V + = +9.0 Vdc, V~ = -9.0 Vdc)
(V in = 0.8 Vdc, R L = 3.0kft, V + = +13.2 Vdc, V~ = -13.2 Vdc)

+6.0
+9.0

V

Output Voltage Low

(V in = 1.9 Vdc, R L = 3.0kft, V + = +9.0 Vdc, V~ = -9.0 Vdc)
(V jn = 1.9 Vdc, R L = 3.0kft, V + = +13.2 Vdc, V~ = -13.2 Vdc)

-6.0
-9.0

V

Positive Output Short-Circuit Current

+6.0/+12

mA

Negative Output Short-Circuit Current

-6.0/- 12

mA

Output Resistance (V + = V~ = 0, |V | = ±2.0V)

300 (min)

ft

Positive Supply Current (R\_ - «>)

V in = 0.8/1.9V V+ = +9V

V+= 12V

V + = 15V

6/20
7/25
12/34

mA

Negative Supply Current (Rl - °°)
V jn = 0.8/1. 9V V~ = -9V
V- = -12V
V~ = -15V

0/-17
0/-23
-2.5/-34

mA

Power Dissipation

(V + = 9.0 Vdc, V- = -9.0 Vdc)
(V+ = 12 Vdc, V- = -12 Vdc)

333
576

mW

SWITCHING CHARACTERISTICS (V + = +9.0 ± 1% Vdc, V~ = -9.0 ± 1% Vdc, T A = +25°C)
Propagation Delay Time (Z\_ = 3.0k and 15 pF) 200

nS

Fall Time (Z L = 3.0k and 15 pF)

75

nS

Propagation Delay Time (Zl = 3.0k and 15 pF)

120

nS

Rise Time (Zl = 3.0k and 15 pF)

100

nS

♦Parameters are min/max limits with V + = +9.0 ± 1% Vdc, V
unless otherwise noted.

-9.0 ± 1% Vdc, T A = to +75°C

Logic Diagram

CONNECTION DIAGRAM

Typical Application

LINE DRIVER
SG1488J

r-.\

x>

DTL LOGIC INPUT -

DTL LOGIC OUTPUT

58

Line Receivers

SG1489/1489A

The SG1489 monolithic quad line receivers are designed to interface data terminal equipment with data communications equipment in
conformance with the specifications of EIA Standard No. RS-232C.

• Input Resistance — 3.0k to 7.0k&

• Input Signal Range - ±30 Volts

• Input Threshold Hysteresis Built In

• Response Control

a) Logic Threshold Shifting

b) Input Noise Filtering

PARAMETERS*

1489/1489A

UNITS

Power Supply Voltage (max, T^ - 25°C)

10

V

Input Signal Range (max, T/\ ■ 25°C)

±30

V

Output Load Current (T^ * 25°C)

20

mA

Package Types

J

-

Power Dissipation (Package Limitation, Ceramic Dual In-Line Package)
Derate above T/\ - +25°C

1000
6.7

mW
mW/°C

Operating Temperature Range

to +75

oc

Storage Temperature Range

-65 to +175

o C

Positive Input Current (V m - +25 Vdc)
(V in = +3.0 Vdc)

3.6/8.3
0.43

mA

Negative Input Current (Vj n = -25 Vdc)
(V jn - -3.0 Vdc)

-3.6/-8.3
-0.43

mA

Input Turn-On Threshold Voltage
(T A - +250C, Vql < 0.45V) SG 1 489J
SG 1489 A J

1.0/1.5
1.75/2.25

V

Input Turn-Off Threshold Voltage
(Ta = +25°C, Vqh > 25V, I L = -0.5 mA) SG1489J

SG 1489 A J

0.75/1.25
0.75/1.25

V

Output Voltage High (V in - 0.75V, l|_ - -0.5mA)

(Input Open Circuit, \{_ = —0.5 mA)

2.6/5.0
2.6/5.0

V

Output Voltage Low (Vj n = 3.0V, I l ■ 10mA)

0.45

V

Power Supply Current (Vj n = +5.0Vdc)

26

mA

Power Consumption (Vj n - +5.0Vdc)

130

mW

SWITCHING CHARACTERISTICS (T A =+25QC)

Propagation Delay Time (R[_ - 3.9kH)

85

nS

Rise Time (R|_ ■ 3.9kft)

175

nS

Propagation Delay Time (Rl = 390 fl)

50

nS

Fall Time (R L - 390 «)

20

nS

♦Parameters are min./max. limits with response control pin open, v + = +5.0 Vdc ±1%, T^ = to +75°C unless
otherwise noted.

Logic Diagram

10 Jp C3 13 O — JO 01

20 * 120 *

;^P^ 6 v +__

r

CONNECTION DIAGRAM
FOR J-PACKAGE

Typical Application

LINE DRIVER INTERCONNECTING LINE RECEIVER

S0 1488 J CABLE S0 1489 J

r— .\

SG1489/1489A Chip
(See logic diagram for

:h>

J INTER-

CONNECTING !
OTL LOGIC INPUT w |— ■ CABLE ~*+"

I I

$&

- OTL LOGIC OUTPUT

59

DUAL HIGH-CURRENT OUTPUT DRIVER

SG1627 / SG3627

DESCRIPTION

The SG1627 and SG3627 devices are monolithic, high-
speed driver integrated circuits designed to interface
digital control logic with high current loads. Each device
contains two independent drivers which will either source
or sink up to 500 mA of current. The sink transistor is
designed as a saturating switch while the source
transistor can be used either as a switch or as a constant
current generator with external resistor programming.

Each half of this device contains both inverting and non-
inverting inputs which have two volt thresholds for high
noise immunity. Either input can be used alone to switch
the output, or one input can be strobed with the other.
These units have been designed to directy interface with
the SG1524 Regulating Pulse Width Modulator Circuit.

These devices are supplied in\ ceramic 16-pin D.I.L.
packages. The SG 1627 is specified for operation over a
-55° C to +125°C temperature range while the SG3627 is
intended for industrial applications of 0°C to +100°C.

FEATURES

• Two independent driver circuits

• Outputs will source or sink currents
to 500 mA

• 100 nSec response time

• Full compatibility with SG1524 PWM circuit

• Constant current drive capability

• Two volt threshold for high noise immunity

• Source and sink can be separated for
complementary outputs

SCHEMATIC (one half of total device shown)

«-»~ To Side B

6vS jK

CHIP LAYOUT

CONNECTION DIAGRAM (TO-1 16 OUTLINE)

60

DUAL HIGH-CURRENT OUTPUT DRIVER

SG1627 / SG3627

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, Vqc 30v

Output Collector Voltage 30V

Source or Sink Current 500 mA

Input Voltage 5.5V

Input Current 10 mA

Avg. Total Power Dissipation (Note 1 ) 1 000 mW

Derate Above 50°C 1 mW/QC

Operating Temperature Range

SG1627

SG3627
Storage Temperature Range

-550Cto+1250C
0OCto+100OC

-65OCto+150OC

Note 1 : Total power dissipation is the sum of the control
logic power plus the power of each source and sink output
transistor, factored for duty cycle.

ELECTRICAL CHARACTERISTICS

Unless otherwise stated, these specifications apply for Tj
QOC to +1 00°C for the SG3627. VrjC = 5V.

-550C to +1250C for the SG1627 and

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

High-Level Input Voltage

2.8

-

5.5

Volts

Low-Level Input Voltage

-

1.4

Volts

Input Threshold

-

2.0

-

Volts

Low-Level Input Current

V|=0

-

-1.0

-2.0

mA

Source Off, Leakage Current

Collector V = 30V

-

0.3

1.0

mA

Source On, Collector Sat.
(Source Emitter Grounded,
RSC = 0)

'source = 50 mA

-

1.1

1.7

Volts

'source = 300 m A

-

1.2

1.9

Volts

'source = 500 mA

-

1.3

2.0

Volts

Source On, Emitter Voltage

'source = -50 mA

(Vcc-3V)

-

-

Volts

Sink Off, Leakage Current

Collector V = 30V

-

1.0

100

ma

Sink On, Collector Sat.

•sink = 50 mA

-

0.2

0.4

Volts

l s ink = 300mA,Vcc = 20V

'" N

0.5

0.7

Volts

'sink = 500 mA, l D oost = 25 mA

0.5

0.7

Volts

Current Limit Sense Voltage

RSC=10n,T A = 25OC

600

700

800

mV

Sense Voltage Temp. Coef.

RSC = 10ft

-

1.8

-

mV/oC

Supply Current
(Both sink transistors on)

V C C = 5V

15

20

mA

V C C = 20V

50

65

mA

V C C = 30V

80

90

mA

Output Response, Turn On

Fig. 4, RL = 24n,TA = 250C

-

50

-

nS

Output Response, Turn Off

Fig. 4, R L = 24£2,Ta = 250C

-

100

-

nS

Thermal Resistance ja

-

80

110

OC/W

Thermal Resistance 0jc

-

45

60

OC/W

TOTEM POLE OUTPUT SWITCH CIRCUIT

"TOTEM POLE"
OUTPUT WAVEFORM

61

High-Current Switch Driver

ADVANCE DATA

SG1629/3629

Note: Performance data described herein represent design goals. Final
device specifications are subject to change.

The SG1629 and SG3629 are monolithic integrated circuits designed to
generate the positive and negative base drive currents (l^i and 1^2) required
for high-speed, high power switching transistors. These units are intended
to interface between the secondary of a drive transformer and the base of
an NPN switching device. Positive drive current can be made constant with
an external programming resistor, or can be clamped with a diode to keep
the switching device out of saturation. Negative turn-off current is derived
from a negative voltage generated in an external capacitor. All operating
power is supplied by the transformer secondary and these devices can be
floated at high levels with respect to ground for off-line, bridge converters.

• Self-generating positive and negative currents

• Constant source current (l^i ) to one amp

• Two amp peak sink current (l^) to negative voltage

• Floating operation

• Baker clamp input for non-saturated switching

• 200 nanosecond response

For medium power applications, these units are available in an 8-pin, mini-
cerdip, D.I.L. package; while high power capability is offered in a 9-pin,
TO-66 case. In either package, the SG1629 is specified for operation over
a -55°C to +125°C temperature range while the SG3629 is intended for
industrial applications of 0°C to +100°C.

Electrical Characteristics:

(Unless otherwise stated, these specifications apply for Ta
+125QC for the SG1629 and 0°C to +100°C for the SG3629.

-55°C to

Absolute Maximum Ratings:

Input Voltage + or - Inputs

20V

Collector to Emitter Voltage, Source or Sink

20V

Source Current

2.0 A

Sink Current

3.0 A

Sink Rectifier Current

100mA

Average Total Power Dissipation

(Note!)

R-Package (TO-66)

2500 mW

Derate above 50°C

25 mW/oC

Y-Package (Mini-ceridip)

800 mW

Derate above 50°C

8 mW/°C

Operating Temperature Range

SG1629

-55°C to +1 25<>C

SG3629

0°Cto+100<*C

Storage Temperature Range

-65°Cto+150OC

Note 1: Total power dissipation must include the power in both source
and sink transistors times the duty cycle for each.

Schematic:

v*nO— W

Parameter

Conditions

Typ.

Units

Collector to Emitter Voltage
Source or Sink

v BE = o

30

V

Source Saturation Voltage

I source = 100mA

1

V

• source ~ 500 mA

1.5

V

I source = 1 A

2

V

Clamp Current

+V iri = 20V

18

mA

Current Limit Sense Voltage

' source = 100 mA

.65

V

I source = 1 A

.7

V

Sink Saturation Voltage

» sink = 100 mA

1.0

V

Force Beta = 100

I sink = 500 mA

1.2

V

I sink = 2 A

1.5

V

Sink Current Gain

' sink ~ 2 A

500

Collector to Emitter Leakage
Source or Sink

V B E=0,V CE = 20V

5

JUA

Sink Rectifier Forward Voltage

IF =50mA

1

V

Sink Rectifier Leakage Current

V R =40

1

JUA

Source Response

Turn On

200

nSec

Turn Off

200

nSec

Sink Response

Turn On

200

nSec

Turn Off

400

nSec

Thermal Resistance
R -Package

<*JA

40

OC/W

ffJC

7

©C/W

Y-Package

0JA

125

OC/W

ffjc

40

©C/W

Connection Diagrams:

SinkC (j5

3 SinkE

Clamp [|

3 -v in

r.Sen. [7

7J Sink Dr.

urceE [5

n

3 +v i«

62

High-Current Switch Driver

SG1629 / 3629

-w-

H

3K

.J

Switching
Transistor

T

Figure 1. A centertapped secondary provides low-loss derivation of
negative bias voltage. R3 is only necessary if control of discharge current
is required.

Figure 2. Maximum drive current consistant with load demand is provided
by anti-saturation clamp diode D1, a high-voltage, high-speed, device.

wu

-I

I

I

^

x

0-W-

IS

r^i

Figure 3. A non-centertapped secondary can also be used to generate a
negative bias voltage by the voltage drop across R4. In any of the above
applications, R5 can be used to keep the switching transistor off under
static conditions while the use of C1 alone to the sink drive will provide
dynamic turn-off without a steady-state discharge of C2.

63

SG5520/7520 Series Sense Amplifiers

SG7520/39 — High Speed Sense Amplifiers will detect bipolar
differential signals from memory core arrays and provide logic-level
outputs for interfacing with external logic. These devices are intended
for systems requiring threshold voltage levels of ±15 mV to ±40 mV.

SG7520/21 — Two sense amplifiers are connected to a common
output stage with capability of being flip-flop connected as part of the
memory output register.

SG7522/23 — Two sense amplifiers are connected to a common
output stage. Open collector output transistors may be used as
wiredOR.

SG7524/25 — Two sense amplifiers with independent output stages.

SG7528/29 — Similar to SG7524/25 except analog test points are
brought out.

SG7534/35 — Similar to the SG7524/25 except it has logically
inverted outputs with open collectors for wired-OR.

SG7538/39 — Similar to the SG 7528/29 except it has logically
inverted outputs with open collectors for wired-OR.

SG55XX Series — Available for operation over full temperature range.

PARAMETERS 1

CONDITIONS

SG7520,
21,22,23
24,25,28,29
34,35,38,39

UNITS

Operating Temperature Range

Free Air

to +70

OC

Package Types

J, N (16 pin)

OC

Differential Input Threshold Voltage (min/typ/max)

V ref = 1 5mV SG7520, 22, 24, 28, 34, 38
SG7521,23, 25, 29, 35. 39

V re f =* 40mV SG7520, 22, 24, 28, 34, 38
SG7521.23, 25, 29, 35, 39

11/15/19
8/15/22
36/40/44
33/40/47

mV

Common Mode Input Firing Voltage 3

T A = 25°C, Common Mode Input Pulse:
x r = *f < 15ns, tp(j n ) = 50ns

±2 (typ)

V

Differential Input Bias Current

V + = 5.25V, V- = -5.25V, V jnD = OmV

75

M A

Logical 1 Input Voltage (gate & strobe inputs)

* V + = 4.75V, V- = -4.75V, V in ( ) - 0.8V

2

V

Logical Input Voltage (gate & strobe inputs)

V + - 4.75V, V- = -4.75V, V m M = 2V

0.8

V

Logical Level Input Current (gate & strobe inputs)

V + = 5.25V, V- = -5.25V, V in ( ) = 0.4V

-1.6

mA

Logical 1 Level Input Current (gate & strobe inputs)

V + = 5.25V, V- = -5.25V, V in d ) = 2.4V
(withV in(1 ) = V + )

40
1

MA
mA

Logical 1 Output Voltage

V+ = 4.75V, V- = -4.75V, l| oad = -400jliA,
Vin(1) = 2V,V in( o)= 0.8V

2.4

V

Logical Output Voltage

V+ = 4.75V, V- = -4.75V, l sjnk = 16mA V jn ( ) =
0.8V

0.4

V

V+ Supply Current

T A = 25°C

28 (typ)

mA

V— Supply Current

T A = 25QC

-15 (typ)

mA

Output Short Circuit Current (except 7520/2 1Q)

V+ = 5.25V, V- = -5.25V

2.1/3.5

mA

Output Q Short Circuit Current 7520/21

|V + = 5.25V, V- = 5.25VI

3.3/5.0

mA

Output Leakage Current (7522/23/34/35/38/39)

V+ = 4.75V, V- = -4.75V, V out = 5.25V, V in = 2V

250

juA

Differential Input Overload Recovery Time

VjnD = 2V f t r = tf = 20ns T A = 25°C

20 (typ)

nS

Common Mode Input Overload Recovery Time 5

Vj n CM = ±2V, t r = t f = 20ns T A = 25°C

20 (typ)

nS

Minimum Cycle Time

T A = 25°C

200 (typ)

nS

PROPAGATION DELAY

7520/21 (nS MAX)

(nS
7522/23 MAX)

7524/25 (nS
7528/29 MAX)

7534/35 (nS

TIMES (T A = 25°C)

OUTPUT Q OUTPUT Q

7538/39 MAX)

Input: A-| — A2 or B-j — B2

tpd(1)D (40) tpd(0)D (55)

tpd(0)D (45)

tpd(1)D (40)

tpd(0)D (40)

Input: Strobe A or B

tpd(1)S (30) tpd(0)S (55)

tpd(0)S (40)

tpd(1)S (30)

tpd(0)S (30)

Input: Gate Q

tpd(1)GQ(20) tpd(0)GQ(30)

tpd(0)G (25)

Input: GateQ

tpd(1)GQ

Parameters are min./max. limits with V+ = 5 V, V— = — 5V, T A = 0°Cto +70°C unless otherwise specified.
2

Vj is defined as the d— c input voltage required to force the output of the sense amplifier to the logic gate threshold voltage level.
3

V CMF ' s tne common-mode voltage that will exceed the dynamic range of the input at the specified conditions and cause the logic

output to switch. The specified common-mode input signal is applied with a strobe-enable signal present.
4

Time necessary for the device to recover from the specified differential-input-overload signal prior to the strobe-enable signal.

Time necessary for the device to recover from the specified common-mode-input overload signal prior to the strobe-enable signal.

Quad Bus Transceiver

SG55138 / SG75138

Description:

The SG55138 and SG75138 Quad Bus Transceiver are
designed for two way data communication over single
ended transmission lines. Each of the four identical
channels consists of a TTL input driver and a TTL output
receiver. The driver output is of the open-collector type,
and is designed to handle loads of up to 100 mA
(50 ohms to 5V). The receiver input is internally
connected to the driver output, and has a high impedance
to minimize loading of the transmission line. Because of
the high driver current, and the high receiver impedance, .
a very large number (typically hundreds) of transceivers
may be connected to a single data bus. The receiver
design also features a threshold of 2.3V (typical), pro-
viding a greater noise margin than would be possible
with a TTL threshold receiver. This device also features a
common driver strobe which turns off all drivers (high
impedance), but does not affect receiver operation. This
circuit is designed for operation from a single 5 volt
supply, and it includes a provision to minimize loading
of the data bus when the power supply voltage is zero.
This circuit is available in the 16-pin ceramic (J) package.
The SG75138 is characterized for industrial temperature
range operation (0°C to 70°C), and the SN55138 is
characterized for military temperature range operation
(-50°Ctol25°C).

Features:

• Single 5V Supply

• High Threshold Receivers

• High input Impedance Receivers

• Four Independent Channels

• Common Driver Strobe

• TTL/DTL Compatible Driver and Strobe Inputs

With Clamp Diodes

• High Speed Operation

• 100 mA Open-Collector Driver Outputs

• TTL Compatible Receiver Outputs

• Available in 16-Pin Ceramic (J) Packages

Absolute Maximum Ratings

Supply voltage, Vcc
Input voltage, V IN
Driver output sink current
Storage temperature
Operating free air temperature,

7.0V
5.5V
150 mA
-65°C to 150°C

SG55138 -55°Ctol25°C
SG75138 0°Cto 70°C

Electrical Characteristics over recommended operating free-air temperature range

.

PARAMETER

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

v High Level Input Voltage,
IH Driver or Strobe Inputs

2.0

V

w High Level Input
vih(R) Voltage, Rec. Input

V s = 2.0V
V 0L = 0.4V
l 0L = 16mA

SG55138

3.2

V

SG 75138

2.9

V

V, L Low Level Input Voltage,
Driver or Strobe Inputs

0.8

V

y Low Level Input
v "<<"> Voltage. Rec. Input

V 8 =. 2.0V
V OH = 2.4V
| 0H = 0.4mA

SG55138

1.5

V

SG75138

1.8

V

v High Level Output Voltage,
0H Rec. Output

Vcc = MIN., I „= .4mA
V IMH) =MAX, V 8 = 2.0V

2.4

3.5

V

v Low Level Output Voltage,
0L Rec. Output

Vcc=MIN.,l , = 16mA
V, H (R) = MIN., V 8 = 2.0V

400

mV

v Low Level Output Voltage,
OL Driver Output

Vcc =MIN., I 0I , = 100mA
V s = 0.8V, V D = 2.0V

450

mV

. High Level Input Current,
IH Driver or Strobe Inputs

Vcc = MAX.

V, = 2.4V

40

*A

V, = Vcc

1

mA

. High Level Input
IH Current, Receiver Input

Vcc = 5.0V, V, = 4.5V
V s = 2.0V

25

300

A

. Low Level Input Current
"' Driver or Strobe Inputs

Vcc = MAX., V, ■= 0.4V

-1

-1.6

mA

• Low Level Input
1L Current, Receiver Input

Vcc = MAX., V, = 0.45V
V s = 2.0V

-50

*A

. „ Short Circuit Output
08 Current, Rec. Output

V, = 0.8V, V„ = 2.0V
Vcc = MAX.

-18

-30

-55

mA

. Supply Current,
>CCL All Drivers On

Vcc = MAX., V 8 = 0.8V
V„ = 2.0V

50

65

mA

. Supply Current,
' CCH All Drivers Off

Vcc = MAX., V, = 2.0V

V R == 3.5V

42 ,

55

mA

R Input Current with
IK Power Off, Receiver Input

Vcc = 0.0V, V, = 4.5V

1.1

1.5

mA

v Input Clamp Voltage
IC Strobe, Driver Inputs

Vcc = MIN., I, = -12mA

-1.5

V

Switching Characteristics, V cc = 5.0V, Ta = 25°C

* Not more than one output at a time should

Recommended Operating Conditions

Supply Voltage, Vcc, SG55138
Supply Voltage, Vcc, SG75138
Driver Output Low Current, l 0UB1
Receiver Output Low Current l 0L(R)
Receiver Output High Current, I h<r)
Operating Free-Air Temp.,

SG55138
Operating Free-Air Temp.,

SG75138

be shorted.

ns

MIN. NOM.

MAX.

UNIT

4.5 5.0

5.5

V

4.75 5.0

5.25

V

100

mA

16

mA

R)

-.4

mA

PARAMETER

TEST COND.

MIN. NOM. MAX.

UNITS

Propagation daisy,

t in n\ low to high '***'
♦plmOB) busoutputfrom

drivar input.

V S =0.4V
C t =50pf
Ri=50«l
V t =5.0V

15 24

ns

14 24

n.

. /n a\ high to low laval
♦••hlCDB) but output from
drivar input.

Propagation dalay,
. ik b\ to* to high laval
t «j«( s - B ) but output from

strobe input.

V„ -2.4V
C t =50pf
R L =50fJ
V L =5.0V

18 28

ns

Propagation dalay,
t ro. n\ high to tow (aval
tpHLtSB) but output from

strobe input.

22 32

ns

Propagation delay,
» m n\ low to high level
*plh(BR) rec , iw , r output

from bus input.

V.=2.4V
C L =15pf

R L =40on

V L =5.0V

7 IS

ns

Propagation delay,

*»«l< br ) reMtveV Output
from but input.

8 IS

ns

LOGIC DIAGRAM

Vcc B4 R4 D4 S D3 R3 B3

H^HIiHl4T4^^

^jJiiKiKiHiHiJliHsP

GND Bl Rl Dl D2 R2 B2 GND
Positive logic: B = D + S,R = B

+ 125 °C

65

Quad Line Receiver

SG55154 / SG75154

Description

The SG55154 and SG75154 are monolithic Quadruple Line
Receivers designed to meet the requirements of El A
Standard RS-232-C. These devices are intended to inter-
face between data terminal equipment and communication
equipment but they can also be used for many other types
of relatively short, single-line, point-to-point data trans-
mission systems. While these devices are normally operated
from a single 5-volt supply, a built-in regulator allows
operation to 12 volts without additional components.

Two forms of hysteresis are provided: For normal opera-
tion, the threshold-control terminals are connected to
Vqq-j, pin 15 and the circuit operates with a wide hystere-
sis loop which yields no change in the output should the
inputs go to zero. In the fail-safe mode of operation, the
threshold -control terminals are left open and the hysteresis
loop is reduced such that the output will always go high if
the input goes to zero.

These units are packaged in a 16-pin hermetic cerdip dual-
in-line package. The SG55154 is rated for -55° to +125°C
operation while the SG75154 is specified for operation over
a 0° to +70°C range.

Features

• Fail-safe capability with adjustable input
threshold

• 3 kft to 7 kft input resistance

• Outputs compatible with DTLorTTL

• Built-in hysteresis

• 5V or 12V single supply operation

Absolute Maximum Ratings

Normal Supply Voltage (pin 15) 7V

Alternate Supply Voltage ( 1 6 pin) 14V

Input Voltage to Ta = 70°C ±25 V

toTA=125°C ±10V

Operating Temperature Range

SG55154
SG75154

Storage Temperature Range

Power Dissipation

Derate above 25°C

-55°Cto 125°C
0° to 70°C

-65°Cto+150°C

1000 mW
8 mW/°C

Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) (See Note 1)

PARAMETER

TEST CONDITIONS

MIN TYP MAX
(SEE NOTE 2)

UNIT

V|H

High-level input voltage

3

V

V||_

Low-level input voltage

-3

V

v T+

Positive-going
threshold voltage

Normal operation

0.8

2.2

3

V

Fail-safe operation

0.8

2.2

3

V T-

Negative-going
threshold voltage

Normal operation

-3

-1.1

V

Fail-safe operation

0.8

1.4

3

VT+-VT-

Hysteresis

Normal operation

0.8

3.3

6

V

Fail-safe operation

0.8

2.2

V H

High-level output voltage

l H = - 40n MA

2.4

3.5

V

vol

Low-level output voltage

'OL = 16 mA

0.23

0.4

n

Input resistance

AV| = -25Vto-10V

3

5

7

kft

AV| = -10V to -3V

3

5

7

AV|=-3Vto3V

3

6

AV,=3Vto10V

3

5

7

AV| = 10Vto25V»

3

5

7

v I (open)

Open-circuit input voltage

l,=0

0.2

2

V

'OS

Short-circuit output curren

[*•

Vcd = 5.5V, V| = -5V

-10

-20

-40

mA

'CC1

Supply current from Vcd

V CC1 = 5.5V, T A = 25°C

20

35

mA

'CC2

Supply current from Vcc2

V C C2= 13.2V, T A = 25°C

23

40

*T A = +70°C Maximum
**Not more than one output should be shorted at a time.

NOTE 1 : Above specifications guaranteed over -55°C < T A < +125°C for SG55154 and 0° <T A <70°C for SG75154. All typical
values are at V CC1 = 5V, T A = 25°C.

NOTE 2: The algebraic convention where the most-positive (least-negative) limit is designed as maximum is used in this data sheet for
logic and threshold levels only, e.g., when -3V is the maximum, the minimum limit is a more-negative voltage.

Switching Characteristics, V CC1 = 5V, T A = 25°C, N = 10

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

tPLH

Propagation delay time, low-to-high level output

C L = 50pF, R L = 390ft

22

ns

tPHL

Propagation delay time, high-to-low level output

20

ns

*TLH

Transition time, low-to-high output

9

ns

*THL

Transition time, high-to-low output

6

ns

CHIP LAYOUT

CONNECTION
DIAGRAM

DUAL-IN-LINE
PACKAGE
(TOP VIEW)

66

Dual Peripheral Drivers

SG55450B/75450B SG55460/75460

The SG55450B and SG 55460 Series are general purpose dual
peripheral drivers whose output stage includes a completely un-
committed, high-voltage, high current NPN transistor. Inputs to
the standard TTL gates are diode clamped and fully DTL/TTL
compatible. The output transistors of the SG55450B and
SG75450B are capable of sinking 300 mA and will withstand 30
volts when off. The SG55460 and SG75460 devices have the
same current rating but with higher voltage capability of 40 volts
and only slight reduction in switching speeds.

The SG55450B and SG 55460 are characterized for operation
over the full military temperature range of -55°C to +125°C
while the SG75450B and SG75460 are designed for 0°C to
+70°C operation.

• Current capacity of 300 mA per

driver

• High output voltage capability

• High-speed switching characteristics

• Both military and commercial tem-

perature ranges

ELECTRICAL CHARACTERISTICS

(over operating temperature range and with V*cc - 5V ± 5%, unless otherwise specified)

ABSOLUTE MAXIMUM
RATINGS (Note 1)

SG55450B SG55460
SG75460B SG7S460

Supply Voltage, Vqq

Input Voltage

Vqc to Substrate Voltage

Collector to Substrate Voltage

Collector to Bate Voltage

Collector to Emitter Voltage (Note 2)

Emitter to Base Voltage

Collector Current (Note 3)

Power Dissipation

N Package (plastic)
Derate above 2B°C

J Package (cerdip)
Derate above 2B°C
Operating, Free Air Temperature
Range

SG65450B, SG65460

SG75460B, SG75480
Storage Tampareture Range

7V 7V
5.5V 5.5V

36V 40V

35V 40V

35V 40V

30V 40V
6V 5V

300mA 300mA

600mW 600mW

6.0mW/°C 6.0mW/°C

1000mW 1000mW

6.7mW/°C 6.7mW/°C

-65°Cto+125°C

0°Cto+70 o C
-65°Cto+150°C

{

NOTES:

1. Voltage' values shown ere with respect to ground terminal unlaw
otherwise specified.

2. With base-to-emitter resistance less than 500&2.

3. Both sides of circuit may conduct reted current simultaneously
provided power dissipation rating is not sxcseded.

TTL GATES
Parameter

Test Conditions

Min.

Typ.

Max.

Units

High-level input voltage, V|h

Vol < 0.4V, l OL =16mA

2

—

—

V

Low-level input voltage, V| l

VOH^2.4V, l 0H = -.4mA

—

— .

0.8

V

High-level output voltage, Vqh

V| L = 0.8V, l H = -4rnA

2.4

3.3

—

V

Low-level output voltage, Vql

V|H = 2.0V. l L = 16mA

—

.25

0.4

V

Input clamp voltage, V|

l| = -12mA

—

-1.2

-1.5

V

High-level input current, Iih

V| - 2.4V

—

• —

40

HA

High-level strobe current, Ish

V| - 2.4V

—

—

80

MA

Low-level input current, • g §_

V, - 0.4V

—

—

-1.6

mA

Low-level strobe current, l$L

V| = 0.4V

—

—

-3.2

mA

Input current at max. V, l|

V| = 5.5V

—

—

1.0

mA

Strobe current at max. V, 1$

V S - 5.5V

—

—

2.0

mA

Output short circuit current, Iqs

-18

-35

-55

mA

Supply current, high out, IqcH

V| =

—

2

4

mA

Supply current, low out, IfJCL

V| =5V

—

6

11

mA

OUTPUT TRANSISTORS (High current measurements made with pulse techniques)
Parameter Test Conditions

55450B 75450B 55460 76460

Units

Collector-base breakdown BVcbq

Collector-emitter breakdown BVpER

IC= IQOAtA, ie°o

Emitter-base breakdown BVebQ

Base-emitter voltage V B g

IC - 100/UA, R B E = 500SI~
tE=100jJA, l C °°0

IB" 10mA, lc= 100mA

Collector-emitter saturation Vce (SAT)

lB°30mA, Ic- 300 m A

Current transfer ratio hpg

l B =10mA, l C = 100mA

l B = 30mA, lc = 300mA

V C E = 3V. I c = 160mA, T A => 2S°C

VcE ■ 3V, l C - 300mA, T A * 25°0

V CE = 3V, Ic " 100mA, T A " min.

VCE ° 3V, Ic " 300 mA, T A ■ min.

"25-
30

~2T-
30
20

-55~
30
20
25

Vmax.

V max.
Vmax.

V m ax.
min,
mi

SUBSTRATE ff

EMITTER [7 ■

COLLECTOR [JO ■

BASE [pi-

OUTPUT fji ■

INPUT fji ■

♦v C c(m

'G.-Th,

3E

JJ GROUND
J\ EMITTER
|] COLLECTOR
T] BASE
3] OUTPUT
J] INPUT
JJ STROBE

CONNECTION DIAGRAM

Note: The substrate (pin 8) must always
be at the most negative voltage for
proper device operation.

SWITCHING CHARACTERISTICS (Vqc - 5V, T A = 25°C)

55450B, 75450B

55460.

75460

Parameter

Test Conditions

Typ.

Max.

Typ.

Max.

Units

TTL GATES

Propagation delay time
Low-to-high-level output, tpj_n

C L =15pF

12

22

22

nS

Propagation delay time
High-to-low-level output, tpHL

R! - 400n

8

15

8

nS

OUTPUT TRANSISTORS

' Delay time, t<j

lC - 200mA

8

15

10

nS

Rise time, t r

'b(l) = 20mA
•b(2) - -40mA

12

20

16

—

nS

Storage time, tj

v BE(OH)""-1V

7

15

23

—

nS

Fail time, tf

CL"15pF,
R L -50n

6

15

14

— .

nS

GATES & TRANSISTORS COMBINED

Propegation delay time
Low-to-high-level out, tpi.H

lC - 200mA

20

30

45

65

nS

High-to-low-level out, tpHL

C L M5pF

20

30

35

50

nS

Transition time
Low-to-high-level out. tjLH
High-to-low-level out, tjHL

R L = 50n

7

9

12
15

10
10

20
20

nS
nS

CHIP BONDING
DIAGRAM

67

TRANSISTOR ARRAYS

68

High Voltage, Medium Current Driver Arrays

SG2001 / SG2002 / SG2003

Description

These high voltage, medium current driver arrays are
comprised of seven silicon NPN Darlington pairs on a
common monolithic substrate. All units feature open
collector outputs and integral suppression diodes for
inductive loads. Peak.inrush currents to 600mA are
allowable, making them ideal for driving tungsten filament
lamps also.

Three different input configurations provide optimized
designs for interfacing with TTL, DTL, PMOS, or CMOS
drive signals.

In all cases, the individual Darlington pair collector
current rating is 500mA. However, outputs may be
paralleled for higher load current capability. All devices
are supplied in a 16-pin dual in-line ceramic package.

Absolute Maximum Ratings (at 25°C free-air temperature
for any one Darlington unless otherwise noted).

Output Voltage, V CE

50V

Input Voltage, V, n

20V

Peak Collector Current, IC

600mA

Continuous Collector Current, IC

500mA

Continuous Base Current, IB

25mA

Power Dissipation, PD (per device)

LOW

Total Package* Limitation

2.0W

Derating Factor above 25°C

13mW/*C

Ambient Temperature Range

(Operating) TA

-55°Cto+125*C

Storage Temperature Range, TS

-65*Cto +175'C

Under normal operating conditions, these units will sustain 350mA
per output with VCC = 1.6V at 70'C with a pulse width of 20ms
and a duty cycle of 30%.

Collector currents to 600mA
Low saturation voltage
High speed switching
Closely matched parameters

SG2001
(each driver)

PARTIAL SCHEMATICS

SG2003
(each driver)

-W-O+v

:h driver) i M — 0+ v (each driver) | N — +v (each driver) I W — O

J * t T ,7V 10K J« t TO 2.7K A * T T O

"Mvwe-wvi' X i L\w-»wwvh> * I Lvw-i^vwo Z

7K 3K *T I 7K 3K T I 7K 3K y

"»---- »

Electrical Characteristics at 25°C (unless otherwise noted)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Limits

Units

Min.

Max.

Output Leakage Current

'cEX

V CB = 50V; T A = 70°C

100

>A

Collector-Emitter
Saturation Voltage

V CE (Sat)

l c = 350mA; l B = 500M
l c = 100mA; l B = 250M

1.6
.1.1

V
V

Input Current
Type SG-2002
Type SG-2003

•m on

V,„ = 17V
V hl = 3.85V

1.3
1.35

mA
mA

Input Current SG-2002

l|» off

V in = 6V, T A = 70'C

50

A

Input Voltage
Type SG-2002
Type SG-2003

V in on

V CE = 2V; l c = 350mA
V CE = 2V; l c = 350mA

13
3.5

V
V

DC Forward Current
Transfer Ratio
Type SG-2001

h PE

V CB = 2V; IC = 350mA

1000

Input Capacitance

c ln

30

Pf

Turn-On Delay

tpLM

0.5E ilV to 0.5E out

5

mS

Turn-Off Delay

*PHL

0.5E in to 0.5E oul

5

mS

Clamp Diode Leakage Current

Ir

V R = 50V

50

M

Clamp Diode Forward Voltage

v*

| p = 350mA

2.0

V

CONNECTION DIAGRAM

CHIP LAYOUT

TYPICAL APPLICATIONS

E-C>o-
E-C*>-

E-r>o-

^'

E-Oo-
E-Oo-
E-t>c-

PMOS TO LOAD

TTL TO LOAD

Transistor Arrays

SG3018/3018A/3821/3822/3823/3086

(CA301 8/301 8A) (CA3045, 3046) (CA3026/3054) (CA3086)

These transistor arrays offer Vbe typically matched to ±0.5 mV, less than 10% variation in hfe, operation from
dc to 300 MHz, high current gain from 10 juA to 10 mA and high voltage capability.

SG3018/SG3018A (CA3018,
3018A) Darlington Transistor
Pairs- consists of four mono-
lithic transistors. Two of the four
are internally connected into a
Darlington configuration with a
typical current gain of 4000. The
other two transistors are separate
conventional types.

SG3821 (CA3046, 3045)
Matched Transistor Array - five
general purpose monolithic IMPN
transistors internally connected to
form two independent differential
amplifiers, each with its asso-
ciated current source transistor.

SG3822 (CA3026, 3054) Dual
Differential Transistors- six
monolithic NPN transistors inter-
nally connected to form two
independent differential ampli-
fiers, each with its associated cur-
rent source transistor.

SG3823 Dual Darlington Transis-
tor Array - six monolithic tran-
sistors. Four are internally con-
nected as two independent
Darlington Amplifiers with a
typical gain of 4000. The other
two transistors are separate con-
ventional types.

ABSOLUTE MAXIMUM RATINGS

Collector-substrate Voltage

40V

(CA Series 20V)

Collector-base Voltage

40V

(CA Series 20V)

Collector-emitter Voltage

25V

(CA Series 15V)

Emitter-base Voltage

Collector-Current

Operating Temperature Range

5V

50mA

0-1 25°C (C A Series - 70°C)

3018, 301 8A, 3821,
3822, 3823,

CA301 8/3026/3054
3045/3046/3086

PARAMETERS*

CONDITIONS

UNITS

Collector-Substrate Breakdown

l C =10 M A, l B =

40

20

V

Collector-Base Breakdown

l C = 10/iA, l E =0

40

20

V

Collector-Emitter Breakdown

l C = 100mA, l B =

25

15

V

Emitter-Base Breakdown

l E = 10juA, l c =

5

5

V

Collector-Substrate Leakage

Vcs = 20V, l B =

80

80

nA

Collector-Base Leakage

V C B = 20V, l E =

40

40

nA

Collector-Emitter Leakage

V C E = 20V, l B =

500

500

nA

Forward Current-Transfer Ratio

VcE = 5V, l C = 10/uA

80 (typ)

80 (typ)

-

Forward Current-Transfer Ratio

VCE = 5V, lc = 1mA

50/400

50/400

-

Forward Current-Transfer Ratio

Vqe = 5V, lc = 10mA

80 (typ)

80 (typ)

-

Collector-Emitter Saturation

IC= 10mA, l B = 1mA

0.5 (typ)

0.5 (typ)

V

Gain-Bandwidth Product

Vce = 5V, lc = 3mA

500 (typ)

500 (typ)

MHz

Collector-Substrate Capacitance

VcS = 5V, l C =0

2.0 (typ)

2.0 (typ)

pF

Collector-Base Capacitance

V C B = 5V, I C =

0.4 (typ)

0.4 (typ)

PF

Noise Figure

f = ike, v C e = sv, i c = iooma, r s = ikn

4 (typ)

4 (typ)

dB

Input Offset Voltage for any two transistors

Vce = 5V, l C = 1mA

5

5

mV

Input Offset Current for any two transistors

V C e =5V, l C = 1mA

4

2

MA

Forward Current Transfer Ratio (Darlington Pair),
SG3018/3018A/3823

vce = 5v;i c = 1mA

1500

1500

—

♦Parameters apply for T& = 25°C and are min/max limits unless otherwise specified.
Note: Substrate pin {//?) must be connected to the most negative DC potential -- which should also be a good AC ground -- for
proper isolation between transistors.

SG301 8/301 8A is offered in 12-pin metal can. AH other 3800 Series arrays are offered in N and J 14-pin dual-in-line packages.

301 8/301 8 A

3821/3046/3045/3086

3822/3026/3054

1 n/

m% v%

sml

J r-.033-

mi

Transistor Array:

SG3081/3082

The SG3081 and SG3082 each have seven high-current silicon
NPN transistors integrated into a single monolithic chip. The
SG3081 has all seven emitters common while the SG3082 is
connected in a common collector configuration. Both devices
have a separate substrate pin for more versatile applications.
With current capability to 100 mA per transistor, these arrays are
ideally suited for driving all types of seven-segment displays as
well as other general purpose driver applications.

Collector current to. 100m A
Low saturation voltage
Closely matched parameters

MAXIMUM RATINGS, Absolute-Maximum Values at T A - 25°C

Power Dissipation:

Any one transistor 500 mW

Total package** 750 mW

Above 25°C Derate I i nearly 6.67 mW/°C

Ambient Temperature Range:

Operating -40 to +85 °C

Storage -55 to +150 °C

The following ratings apply for each transistor in the device:

Coilector-to-Emitter Voltage (VcEO*

Collector-to-Base Voltage (Vcbc*)

Collector-to-Substrate Voltage (Vest})

Emitter-to Base Voltage (Vebo)

Collector Current (\q)

Base Current tig)

**SG3081 and SG3082 are available in N and J 16-Pin dual-in-line
packages

16

V

20

V

20

V

5

V

100

mA

20

mA

PARAMETERS*

SYMBOL

CONDITIONS

SG3081/SG3082

UNITS

Collector-Base Breakdown Voltage

BV CB0

IC = 500mA,I E =

20

V

Collector-Substrate Breakdown Voltage

BV C so

l c , =500mA, Ie = 0, Ib =0

20

V

Collector-Emitter Breakdown Voltage

BV C EO

Iq= 1mA, Ib =0

16

V

Emitter-Base Breakdown Voltage

bvebo

l C = 500/u A

5

V

DC Forward-Current Transfer Ratio

"FE

VqE = 5.0 V, l C = 30mA
V CE = 5.0 V, l C = 50mA

50
40

Base-Emitter Saturation Voltage

v BEsat

Iq = 30mA, Ib = 1mA

1.0

V

Collector-Emitter Saturation Voltage:
SG3081,SG3082

lc = 30mA, Ib= 1mA

0.5

SG3081

v CEsat

\q = 50mA, Ib = 5mA

0.7

V

SG3082

lC = 50mA, Ib = 5mA

0.8

Col lector-Cutoff-Current

'CEO

V CE = 10V, l B =

10

ma

Collector-Cutoff Current

"CBO

VcB=10V,l E =

1

ma

♦Parameters are for T A = 25°C and are min/max limits.

NOTE: Substrate pin (/??) must be connected to the most negative DC potential — which should also be a good AC
ground —for proper isolation between transistors.

71

High Current NPN Transistor Arrays

SG3083

SG3183/3183A

This series of arrays consists of five closely -matched, high current
NPN transistors. Although sharing a common monolithic substrate, the
transistors are connected such that all terminals are independent,
including the substrate bias connector. With current capability to 100
mA per transistor, these arrays are ideally suited for all types of driving
applications including relays, lamps, and thyristors. The SG3183 and
SG3183A are higher voltage versions of the SG3083.

FEATURES

• High voltage capability

• Collector current to 100 mA

• Low saturation voltage

• Closely matched parameters

ABSOLUTE MAXIMUM RATINGS

Power Dissipations:

Any one transistor 500 mW

Total package 750 mW

Above 25°C derate linearly 6.67 mW/°C

Ambient Temperature Range:

Operating (N-Package) _40 to +85° C

Operating (J-Package) -55 to +125°C

Storage (both packages) -65to+150°C

Maximum Collector Current 100mA

Maximum Base Current 20 mA

^fc

©

© © ® ©

NOTE: The collector of each transistor is isolated from the sutfttrate by
an integral diode which must be reverse biased by connecting the sub-
strate to a voltage more negative than any collector. To prevent undesired
coupling between transistors, the si
nected to an AC or DC ground.

ELECTRICAL CHARACTERISTICS AT TA = 25°C

PARAMETER SYMBOL CONDITIONS

MIN.

TYP.

MAX.

UNITS

Collector-Substrate Breakdown Voltage, BV cso , lp = 100 /uA

SG3083

20

60

-

V

SG3183

40

70

-

V

SG3183A

50

70

-

V

Collector«Base Breakdown Voltage, BV c _q, lp = 100 m A

SG3083

20

60

-

V

SG3183

40

70

-

V

SG3183A

50

70

-

V

Collector-Emitter Breakdown Voltage, BV CEQ , l_ = 1 mA

-

SG3083

15

24

-

V

SG3183

30

40

-

V

SG3183A

40

50

-

V

Emitter-Base Breakdown Voltage, BV Eao> 1- = 100 ^A

All types

5

6.9

-

V

Collector Cutoff Current, Irp/y v re = 10v

-

-

10

J"A

Collector Cutoff Current, ' CB q. v r R = 10V

~

~

1

MA

DC Forward Current Transfer Ratio, h FE

All types V CE = 3V, l c = 10 mA

50

100

-

V CE '=5V.. c = 50mA

40

75

-

Collector-Emitter Saturation Voltage, V CE (SAT)

SG3083 l c = 50 mA, I B = 5 mA

-

0.40

0.70

V

SG3183 /SG3183A l c = 50 mA, l g = 5 mA

-

1.7

3.0

V

Base to Emitter Voltage, Vg E , V cg = 3V, l c = 10 mA

0.65

0.75

0.85

V

For Q t and Q Matched Pair

Input Offset Voltage IV |0 I V C£ = 3V, l c = 1 mA
Input Offset Current ll, n l V pp = 3V, L = I mA

72

High Voltage, High Current Darlington Transistor Arrays

SG3851 / SG3852 / SG3853

Description

These high voltage, high current Darlington transistor
arrays are comprised of seven silicon NPN Darlington
pairs on a common monplithic substrate. All units feature
open collector outputs and integral suppression diodes for
inductive loads. Peak inrush currents to 750mA are
allowable, making them ideal for driving tungsten filament
lamps also.

Three different input configurations provide optimized
designs for interfacing with TTL, DTL, PMOS, or CMOS
drive signals.

In all cases, the individual Darlington pair collector
current rating is 600mA. However, outputs may be
paralleled for higher load current capability. All devices
are supplied in a 16-pin dual in-line ceramic package.

Absolute Maximum Ratings (at 25°C free-air temperature
for any one Darlington unless otherwise noted).

Output Voltage, V CB

50V

Input Voltage, V ln

25V

Peak Collector Current, IC

750mA

Continuous Collector Current, IC

600mA

Continuous Base Current, IB

25mA

Power Dissipation, PD (per device)

LOW

Total Package* Limitation

2.0W

Derating Factor above 25°C

13mW/°C

Ambient Temperature Range

(Operating) TA

-55°Cto+125°C

Storage Temperature Range, TS

-65°C to +175°C

"Under normal operating conditions, these units will sustain 350mA
per output with VCC = 1.6V at 70°C with a pulse width of 20ms
and a duty cycle of 30%.

Features

• Collector currents to 750mA

• Low saturation voltage

• High speed switching

• Closely matched parameters

SG3851 ^

(each driver) | Pt

PARTIAL SCHEMATICS

:h driver) ( M O+v (each driver) I M +v (each driver) J W —

J* MO TV 10K A * T T O 2.TK A * ? ?

7K 3K T I 7K 3K X I 7K 3K y

SG3853 ^ ^ u

(each driver) J W O +v

2.TK J ' T T O

Electrical Characteristics at 25°C (unless otherwise noted)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Limits

Units

Min.

Max.

Output Leakage Current

'cEX

V CE = 50V; T A = 70°C

100

P A

Col lector- Emitter
Saturation Voltage

V CE (Sat)

l c = 500mA; l B = 800.uA
l c = 100mA; l B = 250M

2.0
1.1

V
V

Input Current
Type SG-3852
Type SG-3853

•in on

V in = 24V
V ln = 5.0V

3.0
3.0

mA
mA

Input Current SG-3852

•in Off

V in .= 6V, T A = 70°C

50

M

Input Voltage
Type SG-3852
Type SG-3853

V in on

V 0E = 2V; l c = 500mA
V CE = 2V; l c = 350mA

17

3.5

V
V

DC Forward Current
Transfer Ratio
Type SG-3851

hp E

V CE = 2V; IC = 350mA

1000

Input Capacitance

c in

30

Pf

Turn-On Delay

tpLM

0.5E ln to 0.5E out

0.5

mS

Turn-Off Delay

Wl

0.5E in to 0.5E oul

0.5

^s

Clamp Diode Leakage Current

•r

* V R = 50V

50

M

Clamp Diode Forward Voltage

v F

l P = 500mA

3.0

V

CONNECTION DIAGRAM

E-Oo-
E-Oo-
E-£x^

E-Cx>-

^h

*:

3

L 3

CHIP LAYOUT

TYPICAL APPLICATIONS

PMOS TO LOAD TTL TO LOAD

OTHER CIRCUITS

Video Amplifiers

Wideband Amplifiers/Multipliers

Wideband Video Amplifiers

Multipliers

Modulators

Zero Voltage Switches

Timers

Dual Timers

74

SG555/SG555C

The SG555 integrated circuit has been designed to generate
accurate time delays with provisions for remote triggering or re-
setting. An external resistor and capacitor will provide precise
control of time delays from microseconds to hours. This circuit
can also be used as a stable oscillator with accurate control of
both frequency and duty cycle through the use of two external
resistors and a single capacitor. The output circuit is designed for
use with load currents to 200 mA and is fully compatible with
TTL circuitry.

Direct replacement for SE5SS/NE555

Both astable and monostabU mod* of
operation

Timing ranga from microseconds through

hours
200 mA output capability (source or

sink)

.006%/°C tamparatura stability
TTL compatible

ABSOLUTE MAXIMUM RATINGS:

Supply Voltage

+18V

Power Dissipation

T-Package (TO-99)

680mW

Derate above 25*>C

5.4mW/oc

M-Package (Minidip)

400mW

Derate above 25°C

4.0mW/°C

Operating Temperature Range

SG5SS

-550Cto+125°C

SG5S5C

0OC to +70OC

Storage Temperature Range

-65OCto+150<>C

Lead Temperature (Soldering,

60 seconds) +300°C

FUNCTIONAL
DIAGRAM

CHIP BONDING
DIAGRAM

r

| 'wtwef| ^.

DISCHARGE

CONNECTION
DIAGRAMS

ELECTRICAL CHARACTERISTICS (T A « 25°C, V + = +5V to +15V unless otherwise specified)

Conditions

SG565

SG5S5C

Parameter

Min

Typ

Max.

Min

Typ.

Max.

Units

Supply Voltage

4.5

18

4.5

16

V

Supply Current

V + = 5V, R L = °°

-_

3

5

—

3

6

mA

V + = 15V, R L - ~

—

10

12

—

10

15

mA

Low State (Note 1)

Timing Error

R A . R B = 1KJ2 to 100KH

Initial Accuracy

C = O.ljxF (Note 2)

—

0.5

2

—

1

—

%

Drift with Temperature

—

30

100

—

50

—

ppm/°C

Drift with Supply Voltage

—

0.005

0.2

—

0.01

—

%/Volt

Threshold Voltage

—

2/3

—

—

2/3

—

X v +

Trigger Voltage

V + = 15V

4.8

5

5.2

.__

5

V

V + = 5V

1.45

1.67

1.9

—

1.67

~

V

Trigger Current

—

0.5

—

■ —

0.5

~

MA

Reset Voltage

0.4

0.7

1.0

0.4

0.7

1.0

V

Reset Current

—

0.1

__

—

0.1

—

mA

Threshold Current

(Note 3)

__

0.1

.25

—

0.1

.25

MA

Control Voltage Level

V+ = 15V

9.6

10

10.4

9.0

10

11

V

V + = 5V

2.9

3.33

3.8

2.6

3.33

4

V

Output Voltage Drop (low)

V + = 15V

'sink = 10mA

—

0.1

0.15

—

0.1

.25

V

'sink ■ SOmA

—

0.4

0.5

—

0.4

.75

V

l SINK = 100 mA

—

2.0

2.2

—

2.0

2.5

V

'SINK = 2 00m A

—

2.5

—

—

2.5

—

V

V+ = 5V

'sink = 8mA

—

0.1

0.25

—

—

—

V

'sink - 5mA

—

—

—

—

.25

.35

V

Output Voltage Drop (high)

'SOURCE - 200mA

—

12.5

—

—

12.5

—

V

V+ = 15V

'SOURCE = 100mA

V+ = 15V

13.0

13.3

—

12.75

13.3

—

V

V + = 5V

3.0

3.3

—

2.75

3.3

—

V

Rise Time of Output

—

100

—

—

100

—

nsec

Fall Time of Output

—

100

—

—

100

—

nsec

n output high typically 1mA Ian.
\l and V+ - 16V.

APPLICATIONS

MONOSTABLE
OPERATION

t2 (output low) - o.ae (Re> c

* (R A + 2R B )C

75

ASTABLE
OPERATION

Dual Timer

SG556/SG556C

The SG556/SG556C IC timing circuit is the equivalent of two 555-
type timers in one 14-pin dual-in-line package. Each section of the
device is capable of producing accurate time delays or oscillations. A
resistor and a capacitor are the only external parts needed to control
time delays from microseconds through hours. For use as an oscillator,
two external resistors and a capacitor provide control of the free run-
ning frequency and duty cycle. Triggering and resetting terminals are
provided and the circuit will trigger and reset on falling waveforms.

The SG556/SG556C Dual Timer lowers over-all system cost, reduces
board space and assembly time required and provides matching and
tracking characteristics which are superior to two separate timers.

• Direct replacement for SE556/NE556

• Both astable and monostable mode of operation

• Timing range from microseconds through hours

• 200 mA output capability (source or sink)

• .005%/°C temperature stability

• TTL compatible

ABSOLUTE MAXIMUM RATINGS

Supply Voltage
Power Dissipation
N-Package (plastic)

Derate above 25°C
J— Package (cerdip)
Derate above 25°C

Operating Temperature Range

+18V

600 mW

6.0 mW/°C

1000 mW

6.7 mW/°C

-55°Cto+125°C

SG556C 0OC to +70°C

Storage Temperature Range -65°C to +150°C

Lead Temperature (Soldering, 60 seconds) +300°C

CONNECTION DIAGRAM

TRIGGER B|T

OUTPUT B (7

RESET B fw

CONTROL B (vT

THRESHOLD B {«

OISCHARGE B {«

V + El

3 GROUND
3 TRIGGER A
3 OUTPUT A
7} RESET A
3 CONTROL A
3 THRESHOLD A
3 DISCHARGE A

FUNCTIONAL DIAGRAM
(Each Side)

3-^

r

s

ELECTRICAL CHARACTERISTICS (T A = 25°C, V + = +5 to +15 V unless otherwise specified)

Parameter

Conditions'

Mjn.

SGSS6
Typ.

Max.

Min.

SG5S6C
Typ.

Max.

Units

Supply Voltage

4.5

—

18

4.5

—

16

V

Supply Current (each side)

V + = 5V. R|_ = °°
V+= 15 V, R|_ = ~
Low State (Note 1)

"

3
10

5
11

"

3
10

6

14

mA
mA

Timing Error (Monostable)

Initial Accuracy

Drift with Temperature

Drift with Supply Voltage

RA, RB=2k«to 100 kJ2
C= 0.1 mF (Note 2)

—

0.5
30
0.05

1.5
100
0.2

—

0.75
50
0.1

__

%

ppm/c-C

%/Volt

Timing Error (Free Running)

Initial Accuracy

Drift with Temperature

Drift with Supply Voltage

RA,RB = 2knto100kI2
C = 0.lMF(Note2)

—

1.5
90
0.15

—

™

2.25
150
0.3

—

%

ppm/0C

%/Volt

Threshold Voltage

—

2/3

—

—

2/3

__

XV+

Trigger Voltage

V + =15V
V+ = 5 V

4.8
1.45

5
1.67

5.2
1.9

5
1.67

—

V
V

Trigger Current

—

0.5

—

—

0.5

—

MA

Reset Voltage

0.4

0.7

1.0

0.4

0.7

1.0

V

Reset Current

.._

0.1

—

—

0.1

—

mA

Threshold Current

(Note 3)

—

0.03

0.1

—

0.03

0.1

JiA

Control Voltage Level

V+ = 15 V
V+ = 5V

9.6
2.9

10 -
3.33

10.4
3.8

9.0
2.6

10
3.33

11

4

V
V

Output Voltage Drop (low)

V+= 15 V
ISINK='10mA
ISINK = 50 mA
'SINK = 100 mA
•SINK = 200 mA
V+ = 5V
'SINK = 8 mA
"SINK = 5 mA

::

0.1
0.4
2
2.5

0.1

0.15
0.5
225

0.25

~

0.1
0.4
2
2.5

0.25

0.25
0.75
2.75

0.35

V
V
V
V

V
V

Output Voltage (high)

'SOURCE = 200 mA
V+=15V

'SOURCE = 100 mA
V+= 15 V
V+=5V

13
3

12.5

13.3
3.3

—

12.75
2.75

12.5

13.3
3.3

—

V

V
V

Rise Time of Output

—

100

—

—

100

—

ns

Fall Time of Output

—

100

—

—

100

—

ns

Discharge Leakage Current

—

20

100

—

20

100

nA

Matching Characteristics
Between Each Section
Initial Timing Accuracy
Timing Drift with
Temperature
Drift with Supply Voltage

—

0.05

±10
0.1

0.1
0.2

—

0.1

±10
0.2

0.2
0.5

%

ppm/0C
%/Volt

CHIP BONDING DIAGRAM

APPLICATIONS

MONOSTABLE

76

Video Amplifiers

SQ733/733C

The SG733/733C are monolithic two-stage wideband amplifiers. These
devices offer excellent gain stability at any gain setting and provide fixed
gain options of 10, 100 and 400 without external components. All stages
are current source biased to obtain high common mode and power supply
rejection and emitter followers are used at the output to minimize the
effects of capacitive loading. The devices are particularly well suited for
applications requiring a fast linear function such as video and pulse
amplifiers.

• 120MHz bandwidth

• Gain options of 10, 100, 400 without external components

• 250ksi input resistance

• No external frequency compensation necessary

PARAMETERS*

733

733C

UNITS

Supply Voltage

±6V

±6V

V

Operating Temperature Range

-55 to +125

to +70

OC

Package Types

T,J

T, J, N

-

Differential Voltage Gain
Gainl 1
Gain 2 2
Gain 3 3

300/500
90/110
* 9/11

250/600

80/120

8/12

v/v

Bandwidth
Gain 1 1

Gain 2 > R s = 50ft
Gain 3 )

40 (typ)
90 (typ)
120 (typ)

40 (typ) ,
90 (typ)
120 (typ)

MHz

Risetime

Gain2,R s =50ft,V out =1Vp. p

10

12

nS

Propagation Delay

Gain 2, R s = 50ft, V out » 1 V p . p

10

10

nS

Input Resistance
Gain 2

20

10

kn

Input Capacitance
Gain 2

2 (typ)

2 (typ)

PF

I nput Offset Current

3

5

M A

Input Bias Current

20

30

ma

Input Voltage Range

±1 '

±1

V

Common Mode Rejection Ratio
Gain 2 V cm ± 1 V, f < 100kHz
V cm ± 1V, f = 5MHz

60

60 (typ)

60

60 (typ)

dB

Supply Rejection Ratio
Gain 2 AV S = ±0.5V

50

50

dB

Output Offset Voltage
Gain 1
Gain 2, Gain 3

1.5
1.0

1.5
1.5

V

Output Common Mode Voltage

2.4/3.4

2.4/3.4

V

Output Voltage Swing

3

3

Vp. p

Output Sink Current

2.5

2.5

mA

Output Resistance

20 (typ)

20 (typ)

a

Power Supply Current

24

24

mA

CONNECTION DIAGRAMS

♦Parameters apply for V s = ±6V, at 25°C only and are min/max limits
unless otherwise specified.

Gain Select pins Gj A and Gjq connected together.
2
Gain Select pins G 2 a and G 2B connected together.

All Gain Select pins open.

SG733/733CChip
(Sm T-package diagr
for pad functions)

NJT1 |i
NC(i

GAIN r

OPTION 2A U

NC |u

INPUT 1 £

7] OUTPUT 2

I]nc

3v-

ri GAIN

U OPTION IB

tiGAIN

ii OPTION 2B

gNc

7) INPUT 2

77

Video Amplifiers

SG1401/2401/3401

The SG 1401/2401/3401 video amplifiers are useful over a frequency
range from DC to 200MHz. Internal emitter followers are used to achieve
high input and low output impedances, allowing simple capacitor coupling.
Biasing and gain-setting resistors are internally diffused, eliminating
external resistor networks. The gain may be externally varied through the
use of AGC diodes which are included in the circuit.

• 20dB voltage gain at 100MHz

• 5nsec rise and fall times

• Fixed or variable gain

• Single power supply voltage

• Minimum external components

• Symmetrical limiting

PARAMETERS/CONDITIONS*

1401

2401

3401

UNITS

Operating Temperature Range

-55 to +125

to +70

to +70

OC

Package Types

T,J

T,J

,N

-

Supply Voltage

6/20

6/20

V

Power Consumption, no AGC voltage

110

120

mW

DC Output Voltage

8.7 (typ)

8.7 (typ)

V

Peak-to-Peak Output, Pin 3 (4) to AC gnd

4 (typ)

3 (typ)

V

Voltage Gain, Pin 3 (4) 2 open

2.2/3.2

2.2/3.2

dB

Voltage Gain, Pin 3 (4) 2 coupled to Pin 8 ( 1 1 ) 2

9/11

9/11

dB

Voltage Gain, Pin 3 (4) 2 coupled to Pin 9 (12) 2

18/21

18/21

dB

Voltage Gain, Pin 3 (4) 2 to AC gnd

26/31

24/31

dB

Unity Gain Frequency, Pin 3 (4) 2 to AC gnd

200 (typ)

200 (typ)

MHz

I nput R esistance, 20 dB gain

2.5 (typ)

2.5 (typ)

ka

Output Resistance, 20 dB gain

25 (typ)

50 (typ)

SI

Input Capacitance, 20 dB gain

5 (typ)

5 (typ)

pF

Maximum Power Gain, 20 dB gain, R|_ = 50£2

30 (typ)

30 (typ)

dB

Temperature Stability, 20 dB gain

±1*

±2*

dB

AGC Range

20 (min)

22 (typ)

dB

Noise Figure, 20 dB gain, Rs = 1k

8(min)

6 (typ)

dB

♦Parameters apply only for T^ = 25°C, Vs = +12V, and f = 1 MHz, and are
min/max limits unless otherwise specified.

Over operating temperature range.

Numbers in parentheses refer to dual-in-line package.

CONNECTION DIAGRAMS

where f c is low frequency corner
and R is the gain setting resistance.

27Tf c R
Cs = to 10 pF to minimize high frequency peaking.

O10

for pad functions)

See Applications Notes for additional information.

Wideband Amplifier/Multiplier

SG1402/2402/3402

SG 1402/2402/3402 are monolithic four quadrant multipliers offering
excellent frequency response and provision for use as a variable gain
amplifier with both non-inverting and inverting outputs available. In addi-
tion to linear amplification, the device is also ideal for balanced modula-
tion, pulse or gated amplification, and coincidence detection.

• Single power supply voltage

• Self-contained biasing

• 25dB voltage gain

• Differential or single ended inputs and outputs

• Large bandwidth

• Low power dissipation

PARAMETERS, CONDITIONS*

1402 | 2402

3402

UNITS

Supply Voltage

+18

+18

V

Load Current

15

15

mA

Operating Temperature Range

-55 to +125 Oto+70

to +70

oc

Package Types

J,T | J,T, N

-

Maximum Voltage Gain, single ended

23

20

dB

Variable Gain Range, with ext. balance

55

40

dB

Frequency Response, f — 3 dB

40 (min)

50 ttyp)

MHz

Input Impedance, Pin 5 or 7 (7 or 10) 1

1.2 (typ)

1 .2 (typ)

KSl

Input impedance, Pin 2 or 9 (3 or 12)

1 .8 (typ)

1.8

Ka

Output Impedance, Pin 3 or 8 (4 or 1 1 )

1 100 (typ)

100 (typ)

a

Output Voltage Swing
R L = 100K

R|_=1K

3
1.3

3
1.3

Vpp

Quiescent DC Levels
Pins 5, 6 and 7 (7, 8 & 10) 1

3.6 (typ)

3.6 (typ)

V

Pins 2 and 9 (3 & 12) 1

1.8 (typ)

1 .8 (typ)

V

Pins 3 and 8 (4 & 11) 1

6.5/7.5

7.0 (typ)

V

Output Offset Voltage
Minimum Gain

Maximum Gain

100
200

300
500

mV

DC Output Shift, with max gain change

100

200

mV

Differential Control Voltage, for max
gain change

200 (typ)

200 (typ)

mV

Maximum Gain Variation, over
temperature

2

3

dB

Equivalent Input Noise
(BW= 10MHz, R S =50S7)

25 (typ)

25

juVrms

Power Consumption

85

85

mW

♦Parameters are for T A = 25°C, V + = 10V, f = lOOKHz and are min./max.
unless otherwise specified.

Numbers in parentheses refer to dual-in-line package.

© ©

ADJUST li

NC (9

INPUT fo

OUTPUT [n

CONTROL [|2

NC fa

GND fa

TOP VIEW
JorN
Package

7] INPUT
J\ NC
7] BIAS
~t\ OUTPUT
7] CONTROL
T\ NC

7Jv +

CONNECTION DIAGRAMS

See Applications Notes for additional information.
79

TEST CIRCUIT

ej n = 20 mVrms — L.

= 20 mVrms
f = lOOKHz

Multipliers

SG1595/1495

The SG 1595/1495 four quadrant analog multipliers are designed for
applications where the output voltage required is a linear product of two
input voltages. Both types provide excellent linearity and operation over
a wide supply range and input voltage range. Applications include use as
multipliers, dividers, squarers, phase detectors, frequency doublers and as
balanced modulators.

• Excellent linearity

• Adjustable scale factor

• Excellent temperature stability

• Wide bandwidth

• High input voltage range

• Wide supply voltage operation

PARAMETERS/CONDITIONS*

1595

1495

UNITS

Operating Temperature Range

-55 to +1 25

to +70

OC

Package Types

J

J, N

-

Applied Voltage 2

30

30

V

Differential Input Signal

V 9 -V 12 = ±(6 + li3Rx)
V 4 -V 8 = ±(6 + l 3 Ry)

-

Maximum Factor Adjust Current

10

10

mA

Linearity Error in Percent of Full
Scale (T A = 25°C)
-10 < V x < +10 (V y = ±10V)

-10 < V y < +10 (V x = ±10V)

1.0
2.0

2.0
4.0

(% max)

Squaring Mode Error
T A = 250C

T A = 0°C to +70OC

T A = -55 Cto+125°C

0.5
0.75

0.75
1.0

(% typ)

Scale Factor (adjustable)

2R L

l 3 R x R y

0.1 (typ)

0.1 (typ)

-

Input Resistance

35 (typ)

20 (typ)

Mfl

Differential Output Resistance

300 (typ)

300 (typ)

KSl

Input Bias Current

8.0

12

ma

1 nput Offset Current

1.0

2.0

ma

Common Mode Gain

-50

-40

dB

Output Common Mode Voltage

21 (typ)

21 (typ)

V

Differential Output Voltage Swing

±14 (typ)

±14 (typ)

V

Pos Supply Voltage Rejection Ratio

5 (typ)

5 (typ)

mV/V

Neg Supply Voltage Rejection Ratio

10 (typ)

10 (typ)

mV/V

Neg Supply Current

7.0

7.0

mA

Power Consumption

170

170

mW

Average TC of Input Offset Current

2.0 (typ)

2.0 (typ)

nA/oc

Frequency Response (typ)
-3 dB Bandwidth

3.0 (typ)

3.0 (typ)

MHz

3° Relative Phase Shift

750 (typ)

750 (typ)

kHz

1% Absolute Error Due to
Input-Output Phase Shift

30 (typ)

30 (typ)

kHz

Multiply with Op Amp Level Shift

♦Parameters apply over operating temperature range and
unless otherwise specified.

f = 20 Hz Voltage applied between pins 2-1,

1-8, 12-7, 9-7, 8-7, 4-7.

are min/max limits
14-1, 1-9, 1-12, 1-4,

-Wv-

1

K FACTOR ADJUST

SET
UP

RESISTOR*

R1

*5

Re

R?

R8

R9

Rl3

Ra

R B

Rl

Rx

R Y

TOLERANCE

5%

1%

1%

1%

1%

•1%

1%

5%

20%

0.5* 5%

5%

1

V + = +32 V. V- = -15 V
- 10 V <V X <+10 V
-10 V <Vy <+10 V

9.1

121

100

11

121

15

13.7

12

5.0

11

15

15

2

V + = +15 V. V-= -15 V
-5 V <V X <+5V
-5 V <V y <. +5 V

3.0

300

100

100

300

13.7

12

5.0

3.4

8.2

8.2

3

V + = +15 V. V- = -15 V
-10 V<V„ «S+10 V
-10 V <V y «+10 V

1.2

121

100

11

910

13.7

13.7

12

5.0

1.5

15

15-

• A

1 resistors are k ohms.

SGI 595/1 495 Chip (See D-package diagram

SGI 595/1 495 Chip
for pad functions)

-Y INPUT (•
+X INPUT (*

-X INPUT £

XK FACTOR f,
ADJUST L

-0UTPUT (KXY) £

TOP VIEW
J or N
Package

D_

3»-

-Y INPUT
GAIN ADJUST
s) +Y INPUT
GAIN ADJUST

3 +Y INPUT

3 YK FACTOR ADJUST

3 + OUTPUT (KXY)

CONNECTION DIAGRAM

80

Modulators

SG1596/1496

The SGI 596/1 496 are monolithic double-balanced modulator/demodu-
lator devices designed for use where the output voltage is a product of an
input voltage (signal) and a switching function (carrier). Typical applica-
tions include modulation and demodulation of AM, SSB, DSB, FSK, FM
and phase encoded signals. Additional uses include frequency doubling,
linear mixing and chopping.

• Excellent carrier suppreerion '

• Fully balanced inputs and output

• Low offsets and drift

• High common mode rejection

• Adjustable gain and signal handling

• Useful to 100MHz

PARAMETERS/CONDITIONS*

1596

1496

UNITS

Operating Temperature Range

-55 to +125

to +70

OC

Applied Voltage 1

30

30

V

Differential Input Signal, (V7 - Vq)

±5.0

±5.0

V

Differential Input Signal, (V4 - V<|)

±(5 + l 5 R e )

V

Input Signal, (V 2 - V1, V3 - V4)

5.0

5.0

V

Package Types

! J, f

J,T, N

Carrier Feedthrough

v c = 60 mV(rms) sine wave, f c = 1 .OkHz, offset adjusted (typ)
v c = 60 mV(rms) sine wave, f c » 10MHz, offset adjusted (typ)
v c = 300 mVpp square wave, f c = 1.0kHz, offset adjusted (max)
v c = 300 mVpp square wave, f c = 1.0kHz, offset not adjusted (max)

40
140
0.2
100

40
140
0.4
200

/uVrms

Carrier Suppression

f s = 10kHz, 300 mV(rms), f c = 500kHz, 60 mV(rms) sine wave offset adjusted (min)
f s = 10kHz, 300 mV(rms), f c = 10MHz, 60 mV(rms) sine wave offset adjusted (typ)

50
50

40
50

dB

Transadmittance Bandwidth

Rl = 50ft, Carrier Input Port, v c = 60 mV(rms) sine wave, f s = 1.0kHz, 300 mV(rms) sine wave
Signal Input Port, v s = 300 mV(rms) sine wave 2

300 (typ)
80 (typ)

300 (typ)
80 (typ)

MHz

Voltage Gain, Signal Channel v s = 100 mV(rms), f = 1.0kHz -4

2.5

2.5

V/V

Input Resistance, Signal Port f = 5.0MHz

200 (typ)

200 (typ)

kft

Input Capacitance, Signal Port f = 5.0MHz

2.0 (typ)

2.0 (typ)

PF

Single Ended Output Resistance f = 10MHz

40 (typ)

40 (typ).

kft

Single Ended Output Capacitance, f = 10MHz

5.0 (typ)

5.0 (typ)

pF

Input Bias Current (1 1 + I4V2 or (I7 + \q)/2

25

30

MA

Input Offset Current (1 1 - I4) or (I7 - \q)

5.0

7.0

AiA

Average TC of Input Offset Current

2.0 (typ)

2.0 (typ)

nA/°C

Output Offset Current (»6 _ § 9>

50

80

M A

Average TC of Output Offset Current

90 (typ)

90 (typ)

nA/«>C

Signal Port Common Mode Input Voltage Range f s = 1.0kHz

5.0 (typ)

5.0 (typ)

Vd-d

Signal Port Common Mode Rejection Ratio

-85 (typ)

-85 (typ)

dB

Common Mode Quiescent Output Voltage

8.0 (typ)

8.0 (typ)

V

Differential Output Swing Capability

8.0 (typ)

8.0 (typ)

Vp-P

Positive Supply Current (lg + I9)

3.0

4.0

ma

Negative Supply Current (1 10)

4.0

5.0

mA

Power Dissipation

33 (typ)

33 (typ)

mW

♦Parameters are for T A = 25°C and are min/max limits unless otherwise specified.
Voltage applied between pins 6—7, 8—1, 9—7, 9—8, 7-4, 7—1, 8-4, 6—8, 2—5 and 3—5.
2 V 7 — V 8 = 0.5 Vdc

CONNECTION DIAGRAMS

TYPICADNIODULATOR CIRCUIT

n SIGNAL
H INPUTI+)

81

Wide-Band Video Amplifier

SG3001T

Description ,

The SG3001T High Frequency Video amplifier is designed
for broad-band operation to 30 MHz. This monolithic
integrated circuit features differential inputs and outputs,
a voltage gain of 19 dB and AGC capability of 60 dB. The
SG3001T is designed for operation over the full military
temperature range of -55°C to +125°C and is packaged
in a 12-pin TO-5 style hermetic package.

Features

• Full differential operation

• 150 kn input impedance

• 45 SI output impedance

• 30 MHz bandwidth

• 19 dB voltage gain

Absolute Maximum Ratings
Positive Supply Voltage
Negative Supply Voltage

10V
-10V

Output Current
Power Dissipation

Derate above +85QC

25 mA

450 mW
5 mW/°C

Differential Input Voltage

±2.5V

Operating Temperature

-55°Cto+125°C

Common Mode Input Voltage

±2.5V-

Storage Temperature

-65°Cto+150°C
SCHEMATIC

CONNECTION DIAGRAM

0©

«ii® ©

at Connection - DO NOT USE

Electrical Characteristics (T A = 25°C,

V CC =+6V,V EE = -6V. f =

1.75 MHz, F

t L = 1 MSI)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Input Offset Voltage

•

-

1.5

-

mV

Input Offset Current

-

1

10

*iA

Input Bias Current

-

16

36

MA

Output Offset Voltage

R s = 1 kSl

-

54

300

mV

Quiescent Output Voltage

Pins 4 and 5 open

3.8

4.4

5.0

V

Pin5to-V EE

-

4.8

-

V

Pin4to-V EE

-

2.7

-

V

Quiescent Power Dissipation

Pins 4 and 5 open

60

78

120

mW

Pin 5to-V EE

-

71

-

mW

Pin 4 to -V EE

-

110

-

mW

Differential Voltage Gain

16

19

-

dB

f = 20 MHz

10

14

-

dB

3 dB Bandwidth

R s = 50 SI

16

30

MHz

Maximum Output Swing

R s = 50ft

-

5

-

Vp

Noise Figure

R s = 1k

-

5

-

dB

Common Mode Rejection Ratio

f = 1 kHz

-

88

-

dB

Input Impedance

-

150

-

kSl

Input Capacitance

-

3.4

-

Pf

Output Resistance

-

45

-

SI

AGC Range

55

60

-

dB

Zero Voltage Switch

SG3058 / SG3059 / SG3079

Description

The SG3058, SG3059 and SG3079 zero crossing switching
circuits are designed for a wide variety of AC power
applications. These devices will operate with AC input
voltages of 24 to 277 volts at frequencies of 50 to 400
Hertz and will provide an output capable of controlling
most common triacs and thyristors. Each circuit contains
a limiting power supply, a differential sensing amplifier,
a zero-crossing detector and a triac gating circuit. The
SG3058 and SG3059 additionally contain protective
circuits to inhibit thyristor firing under abnormal condi-
tions. The SG3058 is specified over the full military

temperature range of T 55°C to + 125°C while the SG3059
and SG3079 are designed for — 40°C to + 85°C
applications.

Features

• 24V, 120V, 220V, 277V operation at 50, 60 or 400 Hz

• Built-in power supply

• High-gain differential sensing amplifier

• Output synchronized with zero crossing for minimum R.F.I.

• 150 mA output pulse current

Absolute Maximum Ratings

DC Supply Voltage (between pins 2 & 7)

SG3058, SG3059

14 V

SG3079

10 V

Peak Supply Current

(between pins 5 & 7)

±50mA

Output Pulse Current (pin 4)

150 mA

Power Dissipation

J Package (cerdip)SG3058 J

1000 mW

Derate above 25°C

6.7mW/ 8 C

N Package (plastic)SG3059N/SG3079N 600 mW

Derate above 25°C 6.0 mW/ °C
Operating Temperature Range

SG3058J -55°Cto+125°C

SG3059N, SG3079N -40°C to + 85°C

Storage Temperature Range — 65°C to + 150°C

Lead Temperature (soldering 60 sec.) +300°C

Electrical Characteristics (T A = 25°C, AC Line Voltage = 120 Vrms, 50-60 Hz unless otherwise specified)

Parameter

Conditions

Limits

Min.

Typ.

Max.

Units

DC Supply Voltage:

Inhibit Mode

@ 50/60 Hz

R s = 10k, 1, =

6.1

6.5

7.0

V

@ 400 Hz

R s = 10k, 1, =0

—

6.8

—

V

@ 50/60 Hz

R s = 5k, 1,, = 2mA

—

6.4

—

V

Pulse Mode

@ 50/60 Hz

R s =: lOk.l, =0

6.0

6.4

7.0

V

@ 400 Hz

R s = iok, 1, =0

—

6.7

—

V

@ 50/60 Hz

R s = 5k, 1, =2mA

—

6.3

—

V

@ 50/60 Hz, SG3058

R s = iok, 1, =

T A = -55°C to +125°C

5.5

7.5

V

Peak Output Pulse Current

Pin 3 open, V GT =

50

84

—

mA

Pin 3 & 2 connected, V GT =

90

124

—

mA

Inhibit Input Ratio: All Types
SG3058

Pin 9 to 2 Voltage Ratio
T A =-55°Cto + 125°C

.465

.485

.520

—

.450

—

.520

—

Total Gate Pulse Duration:

Positive *L I" 50 " 60 Hz
rosmve rft | 4Q0 Rz

70

100
12

140

MS •

Necative dv f 50 " 60 Hz
Negative— [ 4Q0 Hz

70

100
10

140

MS
MS

Output Leakage Current: All Types

.001

10

M

SG3058

T A = -55°Cto +125°C

—

—

20

M

Input Bias Current: SG3058, SG3059

—

220

1000

nA

SG3079

—

220

2000

nA

Common Mode Input Voltage Range

Pins 9 and 13 connected

—

1.5 to 5

—

V

Pulse Mode Sensitivity

AV at pin 13 to change output

—

6

—

mV

AC Input Voltage

Input Series

Power Rating

(50/60 or 400 Hz)

Resistor (R s )

forR s

VAC

Kn

W

24

2

0.5

120

10

2.0

208/230

20

4.0

277

25

5.0

Applications Data (SG3058 and SG3059 only)

1. Fail-safe protection (pin 14) — When pin 14 is
connected to pin 13, a special protection circuit is
activated which inhibits the output if the sensor either
shorts or opens. To assure proper operation of this
protection, the following conditions should be
observed:

a. Limit the output current to 2 mA with a 5K
dropping resistor.

b. Set the value of R,. and the sensor resistance,
Rx, between 2Kand lOOKohms.

c. Maintain a ratio of R x to R,, between 0.33 and 3.0
over all operating conditions.

2. Inhibit command (pin 1) — A priority inhibit command
at pin 1 will eliminate any output pulse. This signal

should be at least 1.2V at 10^,A and is compatible
with DTL or T 2 L logic outputs.

3. External Trigger (pin 6) — The base of the Darlington
NPN output stage is brought out on pin 6 for direct
control of the output. Signal requirements are the
same as for pin 1.

4. DC Mode (pin 12) — Connecting pins 7 and 12 disables
the zero-crossing detector and allows the flow of output
current on demand from the differential sensing
amplifier. This mode of operation is useful when
comparator operation is desired or when inductive loads
are switched. To avoid overloading th® internal power
supply, the output current should be limited to 2mA
with a 5K dropping resistor.

83

APPLICATIONS NOTES

SG1401 Video Amplifier
SQ1402 Wideband Amplifier/Multiplier
SG1501A Dual Polarity Tracking Regulator
SG1524 Regulating Pulse Width Modulator

84

Applications Notes — The SG1401 Video Amplifier

The SG1401-SG3401 has been designed to provide maximum versatility
as a general-purpose, single-ended amplifier. With its broad frequency
capability, this circuit will be useful in a wide range of applications
provided that the usual considerations for high-frequency circuit designs
are observed. The following information is presented toward aiding in the
optimization of the many possible configurations of this device.

FIXED GAIN

In the circuit configuration shown in Figure 1, the overall voltage gain
is approximated by resistors R1 and the parallel combination of R2 and
R3,as

"1
Av«1 +— , where R =

R 2 R 3
Ro + Rq

25

§20

1

z
<

«15
(9

i io

5

-o-u

€L©

► 1K R2

> 2.4K

Figure 1 .

EXTERNAL PARALLEL RESISTOR - OHMS

Figure 2. External Gain Control.

— I — I —

PIN 3 TO AC GROUND

PIN 3 TO PIN 9

PI

N 3 TO PI

si 8

PIN 3 OPEN
I i

+25 +50 +75 +100 +125

AMBIENT TEMPERATURE - °C

Figure 3. Temperature Stability.

With no external connections, the voltage gain is determined solely by R1
and R2 and is VA or 3 dB. Decreasing the effective value of R2 by
capacitively coupling a lower resistor in parallel, raises the gain. Four fixed
gain settings are provided internal to the circuit; however, any other setting
within the maximum gain of the amplifier is possible with external resistors
as shown in Figure 2.

The value of the coupling capacitor, Cf is determined by the low
frequency response desired, as its capacitive reactance wilt add to the value
of the resistance it couples. Therefore, the lower cutoff frequency will be

f ~— !_

c 2ttR 3 C f

Utilizing the internal 90 or 460 ohm resistors for higher gain settings
provides the added advantage of maximum temperature stability since the
close tracking of adjacent diffused resistors keeps their ratio constant.
Typical temperature variation of this circuit is shown below:

VARIABLE GAIN

Since the dynamic impedance of a forward-biased diode is inversely
proportional to the current through it, a convenient gain control can be
achieved by using a pair of diodes as a variable impedance. In the circuit of
Figure 4, R3 has been replaced by two diodes whose impedances act in
parallel due to the decoupling of Cq. If the diodes are driven from a
voltage source, a logarithmic relationship between gain and control signal is
achieved (see Figure 5); while if a current source is used, the relationship is
linear as shown in Figure 6.

There are two limitations on this form of gain control. First, the diodes'
capacitance limits their effectiveness to frequencies below 20 MHz and,
secondly, the signal voltage across the diodes should be held to less than 50
millivolts RMS to minimize self-modulation of amplifier gain. Additionally,
the AGC current should be limited to 3 mA maximum to keep the diodes
out of saturation.

85

Applications Notes — The SG1401 Video Amplifier

— 0-

DIODE
DRIVE t

€L©

► IK R2 <

> 2.4K *

Figure 4.

k

G.C.

1

F.B. C ^A.G.C. ■■

aL&^)|_5h, :±:c d

■OGNO

I I

PIN 3 TO AC GROUND

25

§20

Z
<
O 15

Ul

|
§10

5

PIN 3 TO PIN 9

C S = — —
C s -4.7pF ---

PIN 3 TO PIN 8

v/

PIN 3 OPEN

V > 1

^u - -*

ii

t"

FREQUENCY - MEGAHERTZ

Figure 7. Frequency Response.

§10

PIN2DRIV
A VOLTAG

EN FROM
E SOURCE

Figure 5. Gain vs. AGC Diode Voltage

PIN2DRIV

EN FROM

ACURREN

T SOURCE

AGC CURRENT - MICROAMPS

Figure 6. Gain vs. AGC Diode Current.

HIGH FREQUENCY STABILITY

With the capability of operation at 100 MHz, the SG1401-SG3401 also
has some susceptibility to external stray reactances; however, with
reasonable care, complete stability may be assured. Some general precau-
tions which should be considered include the following:

(1) Power supply decoupling close to the circuit terminals (a 0.1 mfd
capacitor is usually adequate).

(2) Maintain separation of input and output lines.

(3) Minimize load capacitance or insert a series resistor (up to 50 ohms)
in the output.

(4) Purposely limit the high frequency response with a stabilizing
capacitor Cs between pins 3 and 4.

Since the gain of this circuit is reduced by increasing the amount of
feedback, the potential for instability is greatest when the gain is at its
minimum value. This characteristic and the stabilizing effects of a 4.7
picofarad capacitor between pins 4 and 3 are illustrated in the frequency
response curves presented in Figure 7. The relationship between the value
of Cs and the upper cutoff frequency of a 20 dB gain setting is shown in
Figure 8 below.

S 30

PIN 3

COUP

LEDTC

PIN 9

3 5 10 20 30

Cs BETWEEN PINS C AND D - PF.

Figure 8. Upper Cutoff Frequency vs. Cs Value.

86

Application Notes— SG1402 — Wideband Amplifier/Multiplier

INTRODUCTION

Rapid advances in the state-of-the-art of processing monolithic linear
integrated circuits have made the use of tightly matched components a
practical reality. This in turn has opened the doors to a new class of circuit
characterized by its utility, versatility, and ease of application. It is now
possible to include on a monolithic chip, many of the components which,
because of relatively poor tolerances, were formerly required to be external
to the circuit. The SG1402, shown schematically in Figure 1, illustrates
this capability both by its inclusion of all necessary biasing networks and
by the nature of the circuit itself which requires extremely well matched
component parameters for successful operation.

(§)<£) ®

Figure 1. SG1402 Schematic Diagram.

R7 jc2

<

3 A KU

.<*-<

0i.

Figure 2. Simplified Schematic of the Multiplier Section
of the SG 1402.

The collector current in one side of a simple differential amplifier (Q5
and Q7, for example) is:

'El

1 + expi

(U

where: l^ = sum of currents in each collector

kT

26 millivolts at 25°C

v c = differential input voltage

HOW IT WORKS

The heart of the SG1402 is a four quadrant multiplier consisting of two
cross-coupled differential amplifiers which are jointly controlled by a third
differential amplifier. This part of the circuit is shown in simplified form as
Figure 2. The constant current, l , is divided by Q6 and Q10 and divided
again by each of the upper diff amps such that, for balanced operation,
transistors Q5, Q7, 09, and Q12 each have % l flowing through them. An
examination of the way in which the above diff amps are cross-coupled will
show that while the collector load resistors receive a portion of their
current from each diff amp, the signals will arrive out of phase with respect
to each other. This is because the input voltage, v c , is amplified common
emitter -with 180° phase shift -through Q9 and summed at resistor R7
with the signal which has gone common collector-common base - with 0°
phase shift - through 07 and 05. Therefore, with the circuit perfectly
balanced, the two signals completely cancel out and the output has zero
signal. This can be shown mathematically as follows:

This equation can be differentiated to obtain the transconductance
which, for small values of v c , is:

gm =

di c1 q'Ei

" d v c " 4kT

In a similar manner, the transconductance through Q9 is:
di c2 1»E2

gm =

and the total voltage gain, Av is:

d v c 4kT

di c1 di c2

Av=R. -7-- + -J
L dv„ d

= -^<l -I )

87

Applications Notes — Wideband Amplifier/Multiplier

Since lEI + 'E2 = 'o# it can De seen tnat wnen v m = 0» 'El = 'E2 = 1/ *
l and Av= 0. With l£i and Ie2 being collector currents of another
differential amplifier, the total small-signal gain equation may be written:

A V ° R

Av= — =

4 kT ^ +

1

1

exp

Wi '♦"•fcWI

The circuit gain of the SG 1402 is less than that predicted by the above
equation due to the local feedback offered by the 20 ohm emitter resistors.
The actual relationship between Av and v m is shown in Figure 3 while
Figure 4 graphs the full four-quadrant transfer function between the input
voltage, v c , the control voltage, v m , and the output voltage. Note that the
20 ohm emitter resistors provide linearity for ±60 millivolts of input
voltage while the modulating voltage is only linear for approximately half
that value. It should be recognized from Figure 4 that output limiting
occurs at a constant input voltage regardless of the modulating voltage. In
other words, reducing the gain reduces the maximum peak-to-peak output
swing.

BIASING CIRCUITRY

Key to the utility of the SG1402 is the inclusion of all the biasing and
level shifting circuitry normally required as external components. This is
provided by matched current sources and low impedance voltage sources.

Resistors R1, R2, R3 and R4 are directly across the supply voltage and
establish a current:

' v s- v beqi

b*R| + R2 + R3 + R4

= 1 mAat 10 volts

Transistors Q14 and Q16 have the same geometries and emitter resistors
as Q1 and therefore, with the same base voltage, they each are also
conducting one milliamp and provide the loads for the output emitter
followers, Q13 and Q15. This saves chip area as a transistor requires less
space than a resistor which would establish the same current.

Transistor Q8 has four times the emitter area and % the, emitter resistor
as Q1 and thus defines a current level i of 4 milliamps.

180"

»CPM

SESHI

FT 1

0°CPI

ASES

<IFT

FC

R DIF
MM

: EREN
TIPLY

TIALG
BY 2

AIN,

-80 -60 -40 -20 +20 +40 +60 +80 +100

DIFFERENTIAL CONTROL VOLTAGE - MILLIVOLTS

Figure 3. Differential Gain Control.

-120 -100 -80 -60 -40 -20 +20+40+60+80 +100 +120

DIFFERENTIAL INPUT VOLTAGE - MILLIVOLTS

Figure 4. Multiplier Transfer Function.

The bias voltage levels required at different points in the circuit are all
defined by the same resistors which set the current levels but there is no
mutual interaction due to the insertion of Q2 and Q3 which act as
low-impedance isolators.

Transistors Q4 and Q11 serve only as common-base stages to isolate the
load resistor from the collector capacitance of the parallel diff-amp
transistors. Thus, frequency response is improved with only slight increase
in circuit complexity.

The chip layout of the SG1402 was done to optimize the component
matching regardless of mask registration and process variations. From the
photomicrograph shown in Figure 5, it can be seen how the symmetrical
nature of the circuit was exploited to obtain matched parameters. The chip
has an area of 48 by 39 mils.

Figure 5. Photomicrograph of SG 1402 Chip.

88

Applications Notes — Wideband Amplifier/Multiplier

VARIABLE GAIN AMPLIFICATION

The circuit of Figure 6 shows the simplest application of the SG1402 as
a single-ended, variable-gain amplifier. The signals at the two outputs are
always equal in magnitude and opposite in phase. As the gain control
potentiometer is moved from one end to the other, each output will start
with a maximum signal, reduce to a minimum when the pot is centered,
and increase to maximum again in the opposite phase as the wiper gets to
the other end of the potentiometer.

Figure 6. Single-Ended Variable-Gain Amplifier Configuration with
Manual Gain Control to Provide Maximum Output of Either Phase.

+30

+20

1
z

< +10

o

uu
*

I
>

5-..

m

oc

DC CONTROL VOLTAGE - VOLTS

Figure 8. Gain Variation as a Function of Control Voltage with
Diode Coupled Input.

t I I! « 1 i I H H «

y y II ii y y y y y v

For applications where a phase change is not desired, the incorporation
of a diode as shown in Figure 7 will allow a DC control voltage to vary the
input-output transfer function from a gain of +25 dB to an attenuation of
-25 dB. This relationship is plotted in the graph of Figure 8.

Since this change in transfer function is accomplished with no net
change in either operating currents or bias levels, it is transient-free and
extremely fast-reacting. Thus, the circuit of Figure 7 may also be used as a
gated amplifier with the control requirements compatible with to 5 volt
logic levels. The waveform in Figure 9 shows a 1 MHz signal controlled
with a 10 microsecond pulse.

Figure 7. Addition of Diode Provides Gain Control Without Phase

Change. Balance May be Eliminated if Maximum Attenuation is

not Required.

Figure 9. Gate Amplifier or Pulse Modulator Response. Input is

10 mVrms, 1 MHz and Control Voltage is to 5 Volt Square

Wave with f = 50 kHz.

MODULATION

The multiplying function of the SG1402 can be used to provide both
balanced and amplitude modulation i tilizing the basic circuit shown in
Figure 10. With the potentiometer adjusted for optimum balance, the
carrier signal is canceled out producing a doublesideband waveform at the
output. Depending upon the amplitude of the carrier signal, higher
frequency harmonics can also be generated; however, if only the lower
sideband is used, filtering of the upper sideband will also eliminate all the
harmonics. It should be noted that this balanced modulation is achieved
without the need for the usual transformers and only capacitive coupling
is required. Typical waveforms are shown in Figure 11.

Figure 10. Balanced Modulator.

89

Applications Notes — Wideband Amplifier/Multiplier

\ A A A A A A A A

mum:

y \j \j \j v \j \j \j

Figure 1 1 . Balanced Modulator Output Waveform. (0.1 V/cm,
50jus/cm,f c = 1 MHz, f m = 10 KHz).

If the potentiometer is adjusted so that the circuit is unbalanced, then
the carrier is included in the output signal and amplitude modulation as
shown in Figure 12 results. The optimum adjustment can most readily be
made while observing the output waveform on an oscilloscope. Care should
be taken that neither signal overdrive the circuit.

Figure 12. Amplitude Modulator Output Waveform. (0.2V/cm,
50jus/div,f c =1 MHz,f m = 10KHz).

By using a signal to modulate itself with the circuit shown in Figure 13,
the input is squared and since

2

cos* art

y 2 [i

2 an]

the output frequency is twice that of the input. Typical waveforms for this
frequency doubler application are shown in Figure 14.

Figure 13. Frequency Doubler.

Figure 14. Frequency Doubler Input and Output Waveform.
(50mV/cm, 0.2 jus/div, f 1 = 1 MHz, f2 = 2 MHz).

DEMODULATORS

The same features which make the SG1402 an excellent modulator
provide superior performance when the circuit is used as a single or double
sideband demodulator. The circuit of Figure 15 illustrates the simplicity of
this application. The balance pot is not necessary since the inserted carrier
is eliminated by the low-pass filter at the output.

Figure 15. Balanced Demodulator.

The same general approach may be used for amplitude modulation and
a block diagram of a simple AM detector is shown in Figure 16. Thus, the
SG1402 can be used in receivers which combine SSB and AM to provide
complete signal transformation in either mode of operation.

AM SIGNAL

Umuc

fc>C

Figure 16. AM Detector Block Diagram.

CONCLUSIONS

With the introduction of the SG1402, Silicon General has provided a
powerful tool to the communications engineer and all others working with
information processing. Because of its versatility and capability, this device
opens the way to a much greater utilization of carrier transmission schemes
for data handling in applications ranging from outer space to home
kitchens.

90

Application Notes — SG1501A — Dual-Polarity Tracking Regulators

CIRCUIT OPERATION

The first IC to combine a positive and negative voltage regulator on a
single chip was the SGI 501, and this device has since been supplemented
with three new tracking regulator designs - the SGI 502, the SGI 501 A,
and the SGI 568.

All four of these tracking regulators operate in a similar manner which
is best visualized through the block diagram shown in Figure 1. This circuit
is fundamentally a tracking regulator. That is, the negative voltage is
regulated and the positive output tracks the negative. (Note: In the
SG1568, the circuit is reversed in that the negative side tracks the regulated
positive output; however, the principle is the same.) Negative regulation is
accomplished by providing a constant-voltage reference for the negative
error amplifier, but the reference input to the positive error amplifier is
grounded. This amplifier forces its other input, which is the center-tap
between equal resistors, to also be at zero volts, thus requiring the positive
output to be equal in magnitude but opposite in polarity to the negative
output.

POSITIVE INPUT

POSITIVE OUTPUT

NEGATIVE INPUT

NEGATIVE OUTPUT

Figure 1. Block Diagram

The SG1501 and SGI 501 A are interchangeable and both can be used
by themselves to provide load currents to the maximum defined by
package dissipation, or can be combined with external pass transistors for
currents in excess of two amps. Both devices feature constant current
limiting with the value set by an external resistor. The SGI 568 is similar in
all respects to the SG1501 except that it is frequency compensated in a
slightly different way.

The SG1502 uses the same basic circuit as the SG1501 but has two
important differences. First, the voltage setting resistors are external to the
device providing greater flexibility in adjusting the output voltage levels to
other than ±15V. Secondly, the current limit circuitry has been changed to
allow its use in a foldback mode. Foldback current limiting provides for a
short circuit current value less than the maximum load current and is a
significant feature when the major power dissipation is in external pass
transistors rather than the IC.

Self-contained thermal shutdown is the primary improvement offered
by the SG1501A although increases in both the maximum input voltage
and load current have also been made. With thermal shutdown,
temperature sensing circuitry on the chip is designed to turn off the output
current when the junction temperature exceeds a safe limit - typically
170°C. The significance of this feature is that the designer now need not
design around short-circuit power dissipation limits - the device will take
care of itself. Since short-circuit power is typically more than twice as
much as maximum operating power, this means a two-times, or better,
improvement in load current is possible. It should be noted that even with
thermal limiting circuitry, the maximum current must be controlled to
allow time for this protection to react.

APPLICATIONS

With this technique, a single adjustment of the negative voltage divider
- which changes the negative output level - will also provide exactly the
same change to the positive output voltage. This tracking will hold all the
way from approximately one volt above the reference voltage to a
maximum value of about two volts less than the input supply voltage.

DESIGNER'S CHOICE

With four IC's to choose from some discussion of the significant
features of each type is in order. Three of the devices, the SG1501A, the
SG1501 and the SGI 568 are factory set at ±15V regulators while the
fourth, the SG1502, is user-adjusted to provide outputs from ±8V to
±28V.

POSITIVE

INPUT

Rsc
10fi

.Lei

T .o,

C3 +

1.0 *

i
i_

t V

_ Out Sense Stab ' Bal

n I Adj

POSITIVE I

NEGATIVE I
jn Out Sense Stab'

Gnd

Volt
Adj

NEGATIVE

"sc

ion

1.

-r .01

C4 H
1.0 -

INPUT

wv*

The simplest way to use the SG1501 and SG1501A is in the basic
circuit shown in Figure 2. In this form, the device will handle 50 to
100 mA, depending on the heat sinking (more about this later) and will
provide ±15V outputs with typically less than two millivolts of sensitivity
to either line or load variations. Because of this excellent line regulation,
there is no need for symmetrical input supply voltage levels. The only
requirement is that each level be greater than its associated output and that
the total voltage between positive and negative supplies be less than 60V
(70V for the SG1501A). The minimum input voltage is defined by the
regulator dropout characteristics shown in Figure 3.

I s

< 4

SG1501A

Ta = 25°C
Rsc =

I

1

O T

begoiatoHj^

poswve

z

— -J-s^S^T

5 1

s
z
I

— *-' we^ n

LOAD CURRENT - MILLIAMPS

Figure 2. Basic ±15V, 50 mA Regulator

Figure 3. Regulator Dropout Voltage

91

Application Notes — SG1501A — Dual-Polarity Tracking Regulators

value is such that the time constant, Rsc C, is equal to 10 x 10~6 second.
This capacitor, as well as the output capacitors, C3 and C4, must be low
ESR types such as solid tantalum.

Figure 4. Artificial ground for use with an ungrounded
or single level voltage.

When operating from a single voltage source, an ungrounded supply is
required. An artificial ground can be provided as shown in Figure 4. In this
circuit, the external transistors will conduct as necessary to accommodate
unbalanced load requirements and while the outputs will float between the
two input levels, they will be held constant with respect to this artificial
ground.

CURRENT LIMITING

Current sensing is provided by transistors Q12 and Q13 (see schematic,
Figure 5) which are normally held off by an external base-to-emitter
resistor, Rsc. When the load current passing through this resistor develops
enough voltage, the transistor turns on and diverts drive current away from
the series pass transistors. The sense voltage is equal to approximately
0.6V at Tj = 25° C, but it is temperature dependent decreasing to 0.4V at
125°C as shown in Figure 6. Note that it is junction temperature that
determines the sense level, and thus increasing the power dissipation within
the circuit can lower the value at which limiting will occur. The value of
the limiting resistor, Rsc, should be selected by:

Sense Voltage at Maximum Tj

Rsc =

Allowable Short Circuit Current

where, for maximum regulation, the allowable short circuit current should
be at least 20% more than the maximum expected load current.

Under some conditions, a low-level oscillation may be present on the
negative side when the device goes into current limiting. Should this be a
problem, it may be eliminated by by-passing Rsc with a capacitor whose

g=PO^Q

1

«a*r /Wr

I

f^

i

CURRENT LIMIT

1 1 "" M
_ SENSE VOLTAGE

Rsc

ro,f^

+25 +50 +76 +100 +125

JUNCTION TEMPERATURE - °C

Figure 5. SG1501A Schematic Diagram

Figure 6. Current Limiting Characteristics

POWER CONSIDERATIONS

Although these dual regulators are designed to handle large load
currents and high input voltages, the product of the two can easily exceed
the maximum total device dissipation allowed by the package. The func-
tional limitation which should be considered for each application is that for
maximum reliability the junction temperature of the chip should not
exceed 170°C. This is usually derated to give a maximum design operating
Tjof150°C.

To evaluate the maximum junction temperature possible in a given
application, the following three parameters must be known:

1. The power dissipation within the chip

2. The thermal resistance from junction to ambient (or heat sink)

3. The ambient (or heat sink) temperature

The power dissipation within the chip is equal to the sum of the input
voltage times the standby current plus the input-output voltage differential
times the load current, for each side of the regulator. For example, the
total power dissipation for ±20V inputs, ±1 5V outputs, and 50 mA load
currents is:

Pd = 20 (2) + 20.(3) + 5 (50) + 5 (50)

= 100 mW standby + 500 mW load current
= 600mW

The thermal resistance is the resistance to heat flow from the junction
to the ultimate heat sink. For parts mounted in the open, still air, the
thermal resistance (0jA) is equal to 185°C/watt for the T0-100 metal can
and 125°C/watt for the TO-116 ceramic DIP. Blowing air across the
package, or the use of some form of heat radiator can significantly reduce
these numbers. For example, the use of lERC's model TXBF-032-0256 top
hat radiator on the TO-100 package, reduces 0jA to 130°C/watt, while
their model LI C-214A-2B radiator for the TO-116 will give an 0jA of
50°C/watt for that package. Finally, a perfect heat sink reduces 0jA to
0jC which is 50°C/watt for the T0-100 and 20°C/watt for the TO-116.

92

Application Notes — SG1501A — Dual-Polarity Tracking Regulators

With the above information, the maximum power handling capability of
the package can be determined as follows:

1. Calculate the maximum allowable junction temperature rise:

ATj = 150°C - Ta (max)

2. Calculate the power availability:

Pd = ATj/0jA

3. From this number, subtract the maximum standby dissipation:

Psb = (V+ max) (lsb+) + (V- max) (Isb— )

4. The remainder can be used to determine the maximum load current
as a function of input-output voltage differential.

The curves of Figure 7 show these relationships for each package
under the assumptions of 25°C ambient, and symmetrical input and
output voltages and load currents.

s 100

o

i-

£ 60

K

K

3

Ti(max)

■ 160°C

T A -28«
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O-PACKAGE
^ Pd » 1000 m

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z

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AGE ^^^

180 mW ^"N^
ATE 5.4 mW/oc ~

r

INPUT-OUTPUT VOLTAGE DIFFERENTIAL - VOLTS

Figure 7. Maximum Current Capability

EXTERNAL POWER TRANSISTORS

Additional current handling capability may be provided through the
use of external power transistors in the configuration shown in Figure 8. In
this circuit, the 75 ohm base-to-emitter resistors provide a path for the
regulator standby current and should not be increased in value. An addi-
tional consideration is the use of solid tantalum output capacitors as most
common electrolytic types have too high an equivalent series resistance,
particularly at high frequencies.

The power transistors are not critical and can be selected on the basis
of current and voltage capability, and on mechanical requirements for
practical heat sinking. Note that only one transistor need be used if only
one side has excessive load current. Although low-frequency devices will
minimize the risk of oscillation, unique transistor characteristics may
require a small capacitor (0.1 mfd) from base to ground or a larger value
(5 mfd) from base to emitter for complete stability.

POSITIVE

2NS193 A A .

INPUT

i— *A\

jlC1
1-1.0.

J+C2
1-1.0

• 75
| W,

f

o.3n

1.

05 1

10 -

GROUND — i

! V in 'Out Sent* Stab' Bal G

Adj
1 POSITIVE '

nd
olt

1 NEGATIVE 1

j Vj,, Out Same Stab J )

NEGATIVE

I

0.3fi

L
T

C6 tl
10 -

INPUT

2N5190

►•W

* Solid Tantalum types preferred

Figure 8. High Current Configuration, One Amp Output

FOLDBACK CURRENT LIMITING

With constant-current limiting as shown in Figure 8, the power dissipa-
tion in the pass transistors under short circuit conditions can be substantial.
Here, the thermal limiting feature of the SG1501A can't do much good
since it senses the IC temperature rather than the external transistors. To
eliminate the problem of having to heat sink a short circuit power two to
three times normal operating levels, the use of the SG1502 in the circuit of
Figure 9 should be considered. The dividers of R5'and R6 pre-bias the
current limiting such that when the output is shorted, the maximum
current is substantially reduced from its normal operating level. The values
for R5 and R6 are most easily determined from an itterath/e solution of
the equations below with the trade-off being that a greater amount of fold-
back requires a larger voltage drop across Rsc:

R5
Sense Voltage + — Vo

Max Load Current «

Rsc

R6

Short Circuit Current

Sense Voltage
Rsc

Figure 9. Foldback Current Limiting

VOLTAGE ADJUSTMENTS

With both output voltage levels internally set for 15V, (±200 mV for
the SGI 501/2501 and ±500 mV for the SG3501) these devices require no
additional resistors for many applications. It is possible, however, to
externally vary the output voltages from ±10 to ±23V by using external
resistors to shunt one or both of the internal resistors which set the
negative output level. The positive output will, of course, track the negative
value.

200

O SO

8-

s

rr M

/ R

■SISTOR F

ROM V. A

W. PIN TC

GND^

gs.o

a 3.0

2.0

^>v

IESISTOR

OUTPUT VOLTAGE - ± VOLTS

Figure 10. External parallel resistor required for voltages
other than ±15V.

The simplest way of changing the output levels is to use a- single resistor

93

Application Notes — SG1501A — Dual-Polarity Tracking Regulators

in parallel with R 17 (see Figure 5) for voltages less than 15V and in parallel
with R16 for voltages above 15V. The graph of Figure 10 shows the
approximate value to use in either case.

This method of adjusting output levels has one disadvantage, however.
Diffused resistors have a positive temperature coefficient and while they
can be made to track each other extremely well, with one of them shunted
this tracking becomes degraded. A method offering greater temperature
stability js the use of a pair of resistors with values* low enough to swamp
out the internal divider. By shunting R16 with 1.2k, and R17 with a
resistor selected by:

1.2 (Vo- 6.2)

R17"= kft

6.2

where Vo is the desired output voltage, a four-fold improvement in
temperature performance is achieved at the expense of the additional
divider current. Figure 1 1 shows that temperature variation which may be
expected both with a single shunt resistor and with a divider drawing
approximately five milliamps of current. Note that these temperature
shifts are caused by changes in chip temperature which could result from
variations of either ambient temperature or internal power dissipation.

J

+.06

|+.04

f.02
1

'

/

/

'

sir

GLE EXT

IRNAL RE

SISTOR v

^^

7^

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£-

-

-^

2

I -.02

MAL SHIP

%CHA
CHAN

NGE IN O
3E IN JUN

JTPUT VO

CTION TEMP

OUTPUT VOLTAGE -

Figure 11. Temperature Coefficient of Output Voltage

In the 14 pin dual-in-line package, a connection is provided to the
junction of R21 and R22. An external resistor divider can be used here in
the same manner to either balance the two outputs so that they are exactly
equal in magnitude or to unbalance them for non-symmetrical output
levels.

Although all of these dual regulator types have provisions for adjust-
ment of the output voltage levels, with its user-supplied voltage setting
resistors, the SG1502 is the best choice for applications very far from
±15V. The divider resistors (see Figure 9 ) are selected as follows:

Negative Vo

6.2(R1 + R2)

R1

R3

Positive Vo = — (Negative Vo)
R4

One common application for positive and negative voltages is as a
power source for the widely used 710 and 711 IC voltage comparators.
Since these devices are designed for +12 and -6V operation, it takes a
circuit as shown in Figure 12 to get around the ± 8V minimum output

limitation of these regulators. Here, the nominal ±15V output of the
SGI 501 has been reduced to ±12V by the 2.0k and 1.8k voltage divider.
Six volts are then subtracted from the negative output by the IN4735
zener diode. Because the diode is outside the feedback loop, some minor
variations in the -6V output may be observed due to its temperature
coefficient or dynamic impedance. These variations have negligible effect
on the comparators, however, as the negative voltage is used only to bias
high impedance current sources.

\A* i

V IN OUT STAB SENSE GND

VOLT
Vf N OUT STAB SENSE ADJ

+12 V OUTPUT

-12 V V \ $ V OUTPUT

Figure 12. Using the SGI 501 to provide +12 and -6V outputs.

Zener diodes can also be put to use in applications requiring high input
voltages. In the circuit of Figure 13, the small signal zener diodes reduce
the voltage applied to the IC while allowing the easily heat-sinked power
transistors to absorb the added power dissipation caused by a large input-
output differential.

mi

ruci ii ■ J — J L-i—

Figure 13. Zener diodes used to prevent high input voltages
from appearing across the device.

CONCLUSIONS

With two complete regulators in a single IC, these new regulators offer
an improved approach to power distribution. Their high degree of per-
formance and freedom from large numbers of external components make
"on-card", or distributed regulation a practical reality. By regulating at the
point of use, the system designer has eliminated many knotty problems
such as lead inductance, decoupling, line drop through connectors, etc. In
addition, since each circuit card or module can now regulate its own
voltage, complete interchangeability is more nearly assured and the
problems of equipment maintenance are greatly eased.

94

Application Notes — SG1524

SIMPLIFYING CONVERTER DESIGN WITH
A NEW INTEGRATED REGULATING PULSE WIDTH MODULATOR

Bob Mamma no

Director, Advanced Development

SILICON GENERAL, INC.

Westminster, California

Abstract

A new monolithic integrated circuit is described which contains all the control circuitry for a regulating
power supply converter or switching regulator. Included in this 16-pin dual-in-line package is the voltage
reference, error amplifier, oscillator, pulse width modulator, pulse steering flip-flop, dual alternating
output switches, and current limiting and shutdown circuitry. This device can be used for switching
regulators of either polarity, transformer coupled DC to DC converters, transformer- less voltage doubters
and polarity converters, as well as other power control applications.

INTRODUCTION

Implementing a switching power supply has just become signifi-
cantly easier with the introduction of Ihe SG1524 series of
Regulating Pulse Width Modulator integrated circuits. Long
recognized as offering greatly improved efficiencies, the develop-
ment of switching supplies has been hampered by the com-
plexity of the low-level circuitry required to provide the proper
signals for adequate control of the switching transistors. As a
result, these supplies have tended to be more costly, larger in
size, and with poorer reliability than could be justified by their
improved efficiency. Even when threats of higher energy costs
and potential brown-outs have made switching supplies manda-
tory, their complexity has made the engineering design task a
most formidable undertaking.

The remainder of this paper will describe each of the indivi-
dual blocks in the following diagram in considerable detail
and then offer a few basic application suggestions.

FIGURE 1 -SG1524 BLOCK DIAGRAM

With the introduction of the SG1524, a major portion of the
complex low-level control circuitry has been integrated into a
single LSI linear integrated circuit. This monolithic chip,
packaged in a 16-pin dual-in-line outline, implements the entire
block diagram shown in Figure 1.

It is the integration of all these different functions into a single
IC that qualifies the SG1524 as one of the best examples to
date of large scale integration as applied to analog circuits.

VOLTAGE REFERENCE

The reference circuit of the SG1524 is shown in Figure 2.
This is a complete linear regulator designed to provide a constant
5 volt output with input voltage variations of 8 to 40 volts.
It is internally compensated and short circuit protected. It is
used both to generate a reference voltage and as .the regulated
source for all the internal timing and controlling circuitry. This
regulator may be bypassed for operation from a fixed 5 volt

95

source by connecting pins 15 and 16 together to the input
voltage. In this configuration, the maximum input voltage is 6
volts. While discussing input power, it should be mentioned
that the entire SG1524 IQ draws less than 10 mA of current,
regardless of input voltage.

M &$j

TO COMPARATOR

FIGURE 4 -SG1524 OSCILLATOR CIRCUIT

A second output from the oscillator is a narrow clock pulse*
which occurs each time C T is discharged. This output pulse
is used for several functions as outlined below:

FIGURE 2 - SG1524 REFERENCE CIRCUIT

This reference regulator may be used as a 5 volt source for other
circuitry. It will provide up to 50 mA of output current itself
and can easily be expanded to higher currents with an external
PNP transistor as shown in Figure 3.

rQT-

100U I ,-»>

i— *-^A. * (J5) —

+V, N
8-40 VOLTS

<f> ir : i

FIGURE 3 - SG1524 EXPANDED CURRENT SOURCE

OSCILLATOR

The oscillator in the SG1524 uses an external resistor (R T ) to
establish a constant charging current into an external capacitor
(C T ). This constant-current charging gives a linear ramp voltage
which provides an overall linear relationship between error
voltage and output pulse width. The SG1524 oscillator circuits
is shown in Figure 4.

(1) As a blanking pulse to both outputs to insure that there
is no possibility of having both outputs on simulta-
neously during transitions. The width of this blanking
pulse can be controlled to some extent by the value
selected forC T .

(2) As a trigger for an internal flip-flop which directs the
PWM signal to alternate between the two outputs. Note
that for single-ended applications, the two outputs can
be connected in parallel and the frequency of the output
is the frequency of the oscillator. For push-pull applica-
tions, the outputs are separated and the action of the
flip-flop provides an output frequency % that of the
oscillator.

(3) As a convenient place to synchronize an oscilloscope for
system de-bugging and maintenance.

(4) As a bi-directional port for external timing synchroniza-
tion. The output pulse from this oscillator — which is
stable to within 2% over variations in both input voltage
and temperature - can be used as a master clock for
other circuitry, including other SG 1 524's. It thus follows
that a positive pulse applied to this terminal can syn-
chronize the SG1524 to an external clock signal.

The waveforms of the two outputs frcm the oscillator are
shown in Figure 5.

96

VOLTS ^^^

SSS

TIME - 5 MICROSECONDS/DIVISION

FIGURE 5 -SG 1524 OSCILLATOR WAVEFORMS

ERROR AMPLIFIER

The error amplifier circuit, shown in Figure 6, is a simple dif-
ferential input, transconductance amplifier. Both inputs and the

FIGURE 6 -SG1524 ERROR AMPLIFIER SCHEMATIC

output are available for maximum versatility. The gain of this
amplifier is nominally 10,000 (80 dB) but can be easily reduced
by either feedback or by shunting the output to ground with an
external resistor. The overall frequency response of this ampli-
fier which, by the way, is not internally compensated but yet
is stable with unity gain feedback, is plotted with various values
of external load resistance in Figure 7.

*L^\

*°

7

R L «300kft

1-

111

R L -100kn

R L -30kn

>

R L -Re

littancofro

* Pin 9 to

round

I

FREQUENCY-HERTZ

Phase shifting to compensate for an output filter pole may
readily be accomplished with an external series R-C combina-
tion at the output terminal of the amplifier.

Since the error amplifier is powered by the 5- volt reference
voltage, the acceptable common-mode input voltage range is
restricted to 1.8 to 3.4 volts. This means the reference must be
divided down to be compatible with the amplifier input, but yet
provides the advantage of being able to be used to regulate
negative output voltages. Required input dividers are shown
in Figure 8.

-^

FIGURE 8 - ERROR AMPLIFIER CONNECTIONS

Since this amplifier is a transconductance design, the output is a
very high impedance (approximately 5 MSI) and can source or
sink only 200 microamps. This makes the output terminal
(Pin 9) a very convenient place to insert any programming
signal which is to override the error amplifier. Internal shut-
down and current limit circuits are connected here, but any
other circuit which can sink 200 jtA can pull this point to
ground, thereby shutting off both outputs.

For example, the soft start circuit of Figure 9 can be used to
hold Pin 9 to ground — and thus both outputs off— when power
is first applied. As the capacitor charges, the output pulse slowly
increases from zero to the point where the feedback loop takes
control. The diode then isolates this turn-on circuit from
whatever frequency stabilizing network might also be con-
nected to Pin 9.

®

^X^ COMP^^

^ R < (9) COMPENSATION

T

FIGURE 7 -SG1524
ERROR AMP FREQUENCY RESPONSE

FIGURE 9 - SG1524 SOFT START CIRCUITRY

97

CURRENT LIMITING

The current limiting circuit, while shown in the block diagram
as an op amp, is really only a single transistor amplifier as
shown in Figure 10. It is frequency compensated and has a
second transistor to provide temperature compensation and a
reduction of input threshold to 200 mV. When this threshold

FIGURE 10 - SG1524 CURRENT LIMITING

is exceeded, the amplifying transistor turns on and, by pulling
the output of the error amplifier toward ground, linearly de-
creases the output pulse width. One consideration in using this
circuit is that the sense terminals have a ±1 volt common mode
range which requires sensing in the ground line. However, since
differential inputs are available, foldback current limiting can
be implemented as shown in Figure 1 1.

CURRENT LIMIT

FIGURE 11 - FOLDBACK CURRENT LIMITING

While orr the subject of protection circuitry, although over-
voltage protection is not built into the SG1524, it is relatively
easy to add by using the internal shutdown circuit in conjunc-
tion with a few external components as shown in Figure 12.

This circuit will provide a low level sensing and latching func-
tion and while it won't protect against a shorted output transis-
tor, it will remove the drive signals with no power dissipation.

OUTPUT STAGES

The outputs of the SGI 524 are two identical NPN transistors
with both collectors and emitters uncommitted. These circuits
are as shown in Figure 13 and include an antisaturation net-
work for fast response and current limiting set for a maximum
output current of approximately 100 mA.

<£>■

^

■^AV-

i<jj)®

— i. r

FIGURE 13 - SG1524 OUTPUT STAGE

The availability of both collectors and emitters allows maxi-
mum versatility to enable driving either NPN or PNP external
transistors; however, it must be remembered that this is only a
switch which closes and opens. Power transistor turn-off drive
must be developed externally. Some suggestions for output
drive circuits are shown in Figure 14.

FIGURE 12 -SG1524 OVER VOLTAGE PROTECTION

FIGURE 14 - DRIVING EXTERNAL TRANSISTORS

APPLICATIONS

In considering applications for the SG1524, it appears that
there are three general classifications of switching power supply

98

systems. Included in the first are the transformerless voltage
multiplier circuits shown in Figure 15. These circuits are pri-
marily used for low level applications but can step up, step

<°-W — t — II — — T — M — r— +v °

o

T
X

.X,

-M-

:-»■

r

-»-

T

X

V,M<V

a

-M-

T

=J= iv«i>i

FIGURE 15 - CAPACITOR/DIODE OUTPUT CIRCUITS

down, or change the polarity of an input voltage. The switches
shown can be either the output stages of the SG1 524 or external
transistors. Note that one extra diode is required to protect the
emitter-base junction of switch S A during the times when both
switches are open.

For higher current applications, the single-ended inductor cir-
cuits of Figure 16 represent another classification. Here the two

5

X

i

I

-M-

T

X

V, N >V>

V 1N < V

H4-

X

|V,n|<|V |

FIGURE 16 -SINGLE-ENDED INDUCTOR CIRCUITS

outputs of the SG1524 are connected in parallel, but note that
this does not give twice the current as the switches are alter-
nating internally. This does not affect external performance,
however, and the SG1524 can be used to provide 0-90% duty
cycle modulation in any of the configurations shown.

The third general classification of power supply systems are trans-
former coupled, two types of which are shown in Figure 17.

■tt

■*■

^

M-

T
x

Vo

FIGURE 17 -TRANSFORMER COUPLED CIRCUITS

The push-pull circuit represents the conventional DC to DC
converter with each switch being controlled for - 45% duty
cycle modulation. The second transformer circuit is a single-
ended flyback converter, useful at light loads without a separate
output inductor.

To illustrate the use of the SG1524 in each of the above general
classifications, the following simple, but practical, circuits
are presented:

Figure 18 shows the use of the SG1524 as a low current polar-
ity converter providing a regulated —5 volt output at currents
up to 20 mA from a single positive input voltage. The external

FIGURE 18 - LOW CURRENT POLARITY CONVERTER

components required include the divider resistors to interface
the reference and output voltages with the error amplifier,
a resistor/capacitor to set the operating frequency, and the out-
put diodes and capacitors. The combination of the built-in
current limiting of the SG1524 output stages and the capacitor

99

coupling of the output signal provide full protection against
short circuits and the current limit amplifier is unused. Since
this circuit has no inductor, the output capacitor is more than
enough to stabilize theregulating loop and no additional com-
pensation is required.

Another low-level circuit is the flyback converter shown in
Figure 19.

■*=— i t U± 3lll», i ±

-|<|— J- 0-16V

FIGURE 19- +5 TO ±15 VOLT, FLYBACK CONVERTER

t . '

This circuit is designed to develop a regulated ±15 volt supply
from a single +5 volt source. Note that the' reference terminal
is tied to the input, disabling the internal regulator. The error
amplifier resistors are also tied to the input line so the output
regulation can be no better than the input; however, an external
reference could just as easily have been used.

In this application, the two output stages are connected in
parallel and used as emitter followers to drive a single external
transistor. Since the currents in the secondary of a flyback
transformer are out of phase with the primary current, current
limiting is very difficult to achieve. In this circuit, protection
was provided through the use of a soft-start circuit. If either
output is shorted, the transformer will saturate, providing
more current through the drive transistor. This current is sensed
and used to turn on the 2N2222 which resets the soft-start
circuit and turns off the drive signal. If the short remains, the
regulator will repetitively try to start up and reset with a time
constant set by the soft-start circuit. Removing the short will
then allow the regulating loop to re-establish control.

For higher current applications, the single-ended conventional
switching regulator of Figure 20 is shown.

FIGURE 20-1 AMP, SINGLE-ENDED
SWITCHING REGULATOR

In this case, an external PNP darlington is used to provide a
1-amp current switch. The SG1524 has the two outputs in
parallel, connected as a grounded emitter amplifier. The current
sense resistor is inserted in the ground line and the voltage
across it used for constant current limiting. Note that in addi-
tion to the divider resistors and frequency setting RjCj, a
phase compensation resistor and capacitor is used to stabilize
the loop now that an inductor has been added.

A fourth application would have to be a push-pull, DC to DC
regu lating converter as sh own in F igu re 2 1 .

FIGURE 21 - 5V, 25W, DC TO DC CONVERTER

Here the outputs of the SG1524 are connected as separate
emitter followers driving external transistors. Current limiting
in this application is done in the primary for several reasons:
First, it's easier to live within the ±1 volt common mode limits
of the current limit amplifier; second, since this is a step-down
application, the current — and therefore the power in the
sense resistor - is lower; and third, if the output drive were to

100

become non-symmetrical causing the transformer to approach
saturation, the resultant current spikes will shorten the pulse
width on a pulse-by -pulse basis, providing a first order correc-
tion. Note that the oscillator is set to run at 40 kHz to obtain a
20 kHz signal at the transformer.

This application as shown does not provide input-output
isolation and, of course, that feature is difficult to achieve
within a single IC. There are a couple of ways the SG1524 can
be used with isolated power supply systems, however. The first
is shown in Figure 22 where the SG1524 is direct coupled

separate reference and error amplifier (most easily implemented
with a SG723 regulator IC) is connected on the secondary and
then optically coupled back to the primary side.

As should be evident from the above, the SG1524 was designed
as the first of what will undoubtedly become a larger family of
regulator ICs specifically designed for switching power supplies.
As such, versatility was the primary design goal of this device
and hopefully this goal has been achieved to the degree that
will allow the SG1524 to find application to a wide range of
power control systems.

Input Line

o

ndt

TO

mi

3IIC

O

FIGURE 22 - INPUT/OUTPUT ISOLATION

on the secondary side of the output transformer. The outputs
from the IC are transformer-coupled back to the primary side
to drive the switching transistors. Of course, a separate start-up
power source is needed for the SG1524 but that shouldn't
present much of a problem remembering that the IC draws less
than 10 mA of supply current.

A different method of providing isolation is shown in Figure 23
where the IC is direct coupled on the primary side. Here a

FIGURE 23 - INPUT/OUTPUT ISOLATION

101

Application Notes — SG1524

DEADBAND CONTROL WITH THE SG1524 REGULATING
PULSE WIDTH MODULATOR CIRCUIT

The SG1524 Regulating P.W.M. integrated circuit provides two outputs which alternate in turning on for push-
pull inverter applications. The internal oscillator sends a momentary blanking pulse to both outputs at the end of
each period to provide a deadband so that there cannot be a condition when both outputs are on at the same
time. The amount of deadband is determined by the width of the blanking pulse appearing on pin 3 and can be
controlled by four techniques:

1. For 0.2 to 1.0 microseconds, the deadband is
controlled by the timing capacitor, Ct, on pin 7. The
relationship between C T and deadband is shown in
Figure 3 on the SG1524 data sheet. Of course, since
C T also helps determine the operating frequency, the
range of control is somewhat limited.

2. For 0.5 to 3.0 microseconds, the blanking pulse
may be extended by adding a small capacitor from
pin 3 to ground. The value of the capacitor must be
less than 1000 pf or triggering will become unreliable.

3. For longer and more well-controlled blanking
pulses, a simple one-shot latch similar to the circuit
shown below should be used:

10k

pulse, it will latch for a period determined by C b Rb
providing a well-defined deadband.

Another use for this circuit is as a buffer when several
other circuits are to be synchronized to one master
oscillator. This one-shot latch will provide an adequate
signal to insure that all the slave circuits are com-
pletely reset before allowing the next timing period
to begin.

Note that with this circuit, the blanking pulse holds
off the oscillator so its width must be subtracted
from the overall period when selecting R T and C T .

4. Another way of providing greater deadband is just
to limit the maximum pulse width. This can be done
by using a clamp to limit the output voltage from the
error amplifier. A simple way of achieving this clamp
is with the circuit below:

v ref (16

Comp.

IN916

Gnd(T)-

-►> 5k

TRANSISTORS — Small-signal general purpose types.
For 5 //sec width, C B = 200 pf, R B = 10k

When this circuit is triggered by the oscillator output

This circuit will limit the error amplifier's voltage
range since its current source output will only supply
200juA. Additionally, this circuit will not affect
the operating frequency.

102

Application Notes — SG1524

IMPROVING SWITCHING REGULATOR DYNAMIC RESPONSE

Bob Mammano

Director, Advanced Development

Silicon General, Inc.

Westminster, California

ABSTRACT

Recent introductions of LSI integrated circuits for P.W.M. control have offered considerable simpli-
fication to the job of optimizing the design of switching regulators. In addition to greatly reducing
the necessary circuitry, the linear transfer function of these devices eases the task of stabilizing the feed-
back loop and offers several possibilities for improved response. Experimental methods for evaluating
the response characteristics of the P.W.M. switching and output stages can be used to confirm simpli-
fying assumptions of linear operation. With this data, several approaches to equalization networks can
be compared for performance optimization.

The past few years have seen a major revolution take place in
the field of power supply design. Whether forced upon us by
the need for energy conservation or finally made practical thru
recent advances in semiconductor technology, switching regula-
tors are now the name of the game in voltage control. Novices
soon learn, however, that the implementation of a well-
designed switching supply involves a little more skill than that
required for a linear regulator.

Although the theory of switching regulation has long been
known, there is much practical technology - or art — in design-
ing efficient and reliable systems. This is still true even though
recently introduced semiconductor devices have made the job
at least a little easier. It is the purpose of this discussion to
cover a few of the practical aspects of implementing and stabi-
lizing switching regulators using these newer devices.

INTEGRATED P.W.M. CONTROL CIRCUITS

Recognizing a rapidly growing market, many component
suppliers have introduced new devices designed specifically for
switching regulator applications. These include faster power
transistors with improved S.O.A., low E.S.R. electrolytic capa-
citors, hybrid power devices which include a matched commuta-
ting diode, * 1 > and monolithic IC control devices such as the
SG1524< 2 > which contain all of the P.W.M. control circuitry in
a single 16-pin, dual-in-line package.

103

Figure 1. SG1524 Block Diagram

From the block diagraTn shown in Figure 1, it can be seen that
the SG1524 contains the elements necessary to implement
either single-ended switching regulators or DC to DC converters
of several different configurations. This device includes a volt-
age reference, error amplifier, constant frequency oscillator,
pulse width modulator, pulse steering logic, dual alternating
output switches, and current limiting and shutdown circuitry.
Since many of the different types of applications for this IC
have been discussed earlier^ it should suffice to review only
two of the more common usages as shown in Figures 2 and 3.

The single-ended regulator of Figure 2 is unique because of its
simplicity. This circuit combines an SG1524 with a Unitrode
PIC-625 to build a 5 volt, 5 amp regulator with all the semi-

conductor devices contained in only two packages. This circuit
has an efficiency of over 70% with an input voltage range of
20 to 30 volts, 0.1% line and load regulation, and some added
benefits of constant frequency operation and short circuit
protection.

Figure 2. SG1524 Single-Ended Switching Regulator

Figure 3 shows the same 5-volt, 5 amp output requirement met
this time with a DC to DC converter. The use of high speed
transistors and Shottky rectifiers keep the efficiency more than
80% — significant for a low-voltage output — while maintaining
all the other benefits included in the single-ended circuit.

Figure 3. SG1524 Regulating DC-DC Converter

It' should be recognized that the above circuits represent very
basic applications of an IC control chip. Most practical power
supply systems would probably incorporate many other fea-
tures which may be accomplished by interfacing these IC's with
a small amount of external circuitry to add characteristics such
as: soft-start, oscillator synchronization, dead-band controls,
additional current and/or voltage step-up stages, input-output
isolation, remote overvoltage or overload shutdown, and
response modifying circuitry. It is this latter subject we wish to
explore more fully below.

SWITCHING REGULATOR CONTROL

The basic switching regulator control loop which applies to the
most common forms of implementation is illustrated in Fig-
ure 4. In analyzing this control loop stability, the obvious
immediate problem is the transfer function of the P.W.M. and
output stage. A detailed and accurate analysis of the nonlinear
characteristics of this stage is an extremely difficult and com-
plex task if one is to account for all the parameters which could
possibly be a factor. (3 ' 4 ' 5) On the other hand, if this stage
could be assumed to have a linear transfer function, analysis
becomes a relatively simple application of basic feedback theory.

Figure 4. Basic Regulating Control Loop

A significance of the SG1524 is that it uses a design approach
which makes a linear assumption accurate enough for most
applications. The fact that this device features constant fre-
quency operation, a linear-slope ramp for P.W.M., and fast-
response logic and output circuitry all contribute to minimiz-
ing the errors associated with a linear assumption. Of course,
there are factors external to the IC which could destroy this
assumption. Such things as excessive delay in the switching
transistors, parasitic ringing or oscillation in the power stages,
or nonlinear operation of the magnetics could all cause a result-
ant nonlinear performance. A first exercise for the designer,
then, is to confirm linear operation of the P.W.M. and output
stages of his regulator by evaluating his early breadboard models.

OUTPUT STAG E ANALYSIS

The pulse width modulation is accomplished in the SG 1524 by
comparing the output of the error amplifier with a linear ramp,
or saw-tooth signal from the oscillator. Because the compara-
tor has both high gain and high input impedance, and the error
amplifier has a high output impedance, this node (pin-9)
becomes a very convenient place for inserting a test signal. A
voltage source applied as shown in Figure 5 will completely
override the error amplifier and essentially open the loop with-
out actually breaking any connections. In addition, the test
signal is easily managed because the voltage gain from this point

104

to the output is relatively low. (A voltage level on pin 9 of
from 1 to 4 volts will change the pulse width from zero to maxi-
mum which will yield zero to maximum output voltage.)

Figure 5. Measuring Output Stage Transfer Function

In experimentally attempting to confirm satisfactory operation
of the output stages, the designer hopes to prove that a linear
equivalent circuit model is valid for reasonable analysis. One
such model as proposed by Middlebrook^ is shown in Figure 6.
This model describes the overall AC and DC transfer function
and input and output impedances in terms of the duty cycle
and modulation constant. This model assumes that the effects
of operating frequency, switching delays, and parasitic elements
are well above the frequencies of interest as defined by the
output LC filter.

O = Duty Ratio ■= V /V, N = N c /km

Figure 6. Linear Equivalent Circuit

Values for the inductor and capacitor are normally calculated
on the basis of output ripple current and voltage as follows:

For constant frequency operation,
L _ Vq(Vin-Vo)

V IN f(Al L )

Vq(Vin -Vq)

8Lf2V IN (AV )
where:

and

C =

Vin = peak input voltage to the inductor
Vo - output voltage across the capacitor
f » switching frequency

Ml - peak-to-peak current variation in the inductor
AVq = peak-to-peak ripple voltage across the capacitor.
Note that the actual ripple voltage at the output of the filter
will be AVq, plus Al L times the capacitor E.S.R.

Regardless of the requirements for minimizing the output
ripple, an additional requirement on the filter is that its cutoff
frequency be well below the switching frequency if our original
goal of simple linear analysis is to be met. Specifically, the
switching operation introduces a second order lag at one-half
the switching frequency and for the output filter to dominate,
its cutoff sh6uld be at least an order of magnitude below that
number, or

1

f

2rr VTC " 20
To verify the performance of the resultant hardware, a Bode
plot of the output stage response can be most meaningful.
Ideally, a plot as shown in Figure 7 should show a flat response
to the filter cutoff and then a linear 12 dB/octave rolloff with a

10

» o

i

°-10

z

1

. VOLT

AGEG

AIN

p

HASE -

L
C

- lOOOjiF

§ 20

1

1

»

1

)K

FREQUENCY - HERTZ

Figure 7. Linear Output Stage Response

180° phase shift. By making these plots with varying input
voltage and load current, factors affecting stability such as leak-
age inductance, capacitor E.S.R. , and either saturation or dis-
continuous operation of the magnetics may be evaluated over
the operating conditions of interest. Figure 8 shows typical
plots with less than ideal component parameters. With the char-
acteristics of the output stage defined, attention can be turned
to the error amplifier to develop an equalizing network which
will allow satisfactory closing of the loop.

ERROR AMPLIFIER COMPENSATION

The error amplifier contained within the SG1524 is a transcon-
ductance amplifier in that it has a high-impedance, current
source output. The gain is a function of the output loading and

105

can be reduced from a nominal 80 dB by shunt resistance as
shown in Figure 9. Note also in Figure 9 that the uncompen-

1

V w - 32V.

1

L » 1A ^ -l

VlN

20V. 1

- 5/

L -
C -

1000

• 25V
2A

PHA.

E

NOf

-50
-100
-150

— "V

V

\

k

(

,/

FREQUENCY - HERTZ

Figure 8. Measured Output Stage Response

„■ '

70

R t - -

I

60

R L " IMii

h

&<L

7

R L »

jooKr

5
o

?-

R L =

100 Kf

s^

l'a

>

<%»,

^

FREQUENCY - HERTZ

Figure 9. Open-Loop Error Amplifier Response

sated amplifier has a single pole at 300 Hz and 90° of phase
shift. The unity gain cross-over frequency is 3 MHz and the
large scale slew rate is 0.5 volt per microsecond.

This type of amplifier can be compensated in two ways: The
compensation network can go from the output to ground or it
can be connected from output back to the inverting input. W In
the first case, the voltage gain is:

A v = gmZ c =

8' C Z C
2kT

* 0.002Z C

where Z c is the complex compensation network impedance. If
a feedback approach is used, the gain is:

z c

where Z s is the source impedance driving the input. In cases
where relatively low impedances are desired in a feedback net-
work, it may be necessary to buffer the high output impedance
of the error amplifier. Figure 10c shows the use of an external
emitter follower to provide a low driving impedance for the
feedback network.

I — ra —

'-<D-:,

Figure 10. Error Amplifier Compensation Networks

To stabilize the overall regulator feedback loop of Figure 4, it
should be apparent that the uncompensated loop contains at
least two poles in the output filter and one more in the error
amplifier, a situation which typically results in significant gain
remaining when the total loop phase equals 360°. One of the
simplest compensation schemes is to convert the error amplifier
to an integrator by adding a single dominate pole at a frequency
so low that the loop gain falls below unity well before the cut-
off frequency of the output filter. While this approach yields
a stable closed loop gain as shown in Figure 1 1, the response to

I

0.2 mFO

— Ir—

A

MFLITU

OE

2.S K» I

^

, >L

PHASI

L
C

• 200

• 1001

»F

-SO
-100
-150

N

\

\

V

«*•«

FREQUENCY - HERTZ

Figure 11. Closed Loop Frequency Response

.disturbances is very slow. For example, the waveforms of
Figure 12 show the response to a 20%, or one amp, step change
in load to the circuit of Figure 3 when compensated with a
0.2 mfd capacitor around the error amplifier.

106

If instead of slowing down the error amplifier, a zero, or lead
network is added to cancel one of the output filter poles, we
can keep the total loop phase less than 360° to well beyond the
output filter cutoff.

STIMULUS: ONE AMP STEP CHANGE IN l

UPPER TRACE: ERROR AMP OUTPUT. 500 mV/DIV
LOWER TRACE: REGULATOR OUTPUT, 200 mV/DIV
TIME BASE: 5 MILLISECONDS/DIV

Figure 12. Integrator Compensation Step Response

Figure 13 shows a circuit for accomplishing this by moving the
amplifier pole lower in frequency and adding a zero at the out-
put filter cutoff frequency. Figure 14 shows the effects of this
network on the Bode plot of the error amplifier, and Figure 15
indicates the improvement in recovery from the same one-amp
load change. Note how the output of the error amplifier over-
shoots to give a boost to the output.

Figure 13. Series RC Phase Compensation

N.

^^ INCREASING S^

■ x" \ -

— UNCOMPENSATED

— COMPENSATED

i \ *Nfo

_V

I >- ^

^^

mo"

x

X! :

; n

(9
3

\l v~

~n!

Ui

j\

. :N/:

i\

135 o

^ . I -v -.._ ._

a0 i

2*R C C

2irR Co 2irR c Cc

2rrR C C

Even faster response can be achieved by providing additional
lead networks. For example, another zero may be added by
bypassing the sense feedback resistor. As can be seen in Fig-
ure 16, this greatly improves loop response but offers the haz-
ard of coupling ripple noise directly into the error amplifier.

R c - 30 Kn, C c = .022 mfd

STIMULUS: ONE AMP STEP CHANGE IN l

UPPER TRACE: ERROR AMP OUTPUT, 500 mV/DIV

LOWER TRACE: REGULATOR OUTPUT, 100 mV/DIV

TIME BASE: 5 MILLISECONDS/DIV

Figure 15. Phase Compensated Step Response

Figure 14. Phase Compensated Bode Plot

STIMULUS. ONE AMP STEP CHANGE IN l

UPPER TRACE : "ERROR AMP OUTPUT, 500 mV/DIV
LOWER TRACE: REGULATOR OUTPUT, 50 mV/DIV
TIME BASE: 2 MILLISECONDS/DIV

Figure 16. Double Zero Compensated Step Response

TWO LOOP CONTROL

From the examples presented above, it should be apparent that
the integration method of error amplifier compensation pro-
vides good stability by making the dominate pole so low in fre-
quency that variations in all other circuit parameters become
inconsequential. This technique also provides high accuracy at
DC where high gain can be used and is the type of feedback one
would want 'to take directly from the output of a regulator
since a user might add additional external capacitance, thereby

107

changing the output filter characteristics. Another reason for
using single-poie compensation is to accommodate the use of a
two-stage output filter which can add phase shifts well beyond
180°.

The problem of poor response can then be accommodated by
adding a differentiated signal taken from somewhere else in the
loop. If the time constants and gain factors are properly
selected, the differentiated signal can compensate for the error
in the integrated signal taken from the regulated output.

While it may be possible to combine these two signals with
passive signal conditioning at the input to the error amplifier, a
more straightforward approach is with two separate op amps as
shown in Figure 1 7. Here the error amplifier in the SG 1524 has

Figure 17. Two-Loop Signal Conditioning

been connected as a unity gain summing amplifier and two op
amps from an SG124 quad IC are used as gain stages for signal
conditioning. Since these are single-supply op amps, they are
powered directly from the 5-volt reference voltage supplied by
the SG 1524.

Amplifier A1 provides the DC gain and gets its signal directly
from the output of the regulator. There are several possibilities,
however, for providing the differentiated correction signal
through A2. If rapid response to changes in input voltage is
required, A2's input may be taken through a resistive divider
directly to the input line.< 8 ) This is, of course, not a feedback
signal but the feed forward of an open loop, short-duration cor-
rection signal. The waveforms of Figure 18 show the improve-
ment which this feed-forward signal can offer.

If load transients are the problem, A2's input might be con-
nected to a point where output current could be sensed. This
would best be accomplished by using a current transformer in
series with the output capacitor although the voltage across the
capacitor E.S.R. might also serve as a sense point. In either case,
a low-pass filter with a cuttoff frequency of approximately 1/4

UPPER TRACE: INPUT VOLTAGE STEP CHANGE. 5V/DIV
MIDDLE TRACE: OUTPUT WITH DC FEEDBACK ONLY. 100 mV/DIV
LOWER TRACE: OUTPUT WITH AC FEED FORWARD ALSO. 100 mV/DIV
TIME BASE: 2MILLISECONDS/DIV

Figure 18. Feed Forward Compensation

the switching frequency is necessary to remove the ripple volt-
age before attempting a differentiation. A third possible signal
input is to put a secondary winding on the output filter induc-
tor. This gives an AC signal proportional to V )N - Vq and will
therefore respond to disturbances at either input or output.

SUMMARY

Although integrated circuit controllers for switching supplies
have removed much of the circuit complexity from this type of
regulator, the dynamic analysis of the control loop must still
be optimized for each application. This optimization is made
easier, however, if a linear approximation of the switching
stages can be shown to be valid. The SG1524 controller offers
benefits in this regard as it does provide a linear transfer func-
tion through its pulse width modulation scheme. Therefore,
experimental techniques can be used to simply confirm proper
operation of the power switches and output filter.

With a linear output stage, conventional feedback analysis can
be used to define the best equalizing network achieving a com-
promise between stability and fast response. In some cases it
may even be desirable to provide separate signal paths for
these two parameters but thus, too, can be adapted to the
SG1524 controller with a minimum of external circuitry.
Obviously, no recipes for optimum performance have been pro-
vided herein. Only a few directions which, it is hoped, will
point the way toward the development of specific solutions for
specific applications.

REFERENCES

(1) Unitrode Corporation, "Switching Regulator Design
Guide," Unitrode Publication No. U-68, 1974

108

(2) R. A. Mammano, "Simplifying Converter Design with A
New Integrated Circuit Regulating P.W.M.," Powercon 3
Proceedings, June, 1976

(3) F. C. Lee, Y. Yu, and J. E. Triner, "Modeling of Switching
Regulator Power Stages With and Without Zero Inductor
Current Dwell Time," IEEE P.E.S.C, Record, 1976

(4) A. Capel, J. G. Ferrante, and R. Prajuuk, "State Variable
Stability Analysis of Multi-Loop PWM Controlled Regula-
tor in Light and Heavy Mode," IEEE P.E.S.C., Record,
1975

(5) Y. Yu, J. Bless, and A. Schoenfeld, "The Application of
Standardized Control and Interface Circuits to Three DC
to DC Power Converters," IEEE P.E.S.C, Record, 1973

(6) R. D. Middlebrook and S. Cuk, "A General Unified Ap-
proach to Modeling Switch Converter Power Stages,"
IEEE P.E.S.C, Record, June 1976

(7) J. Graeme, G. Tobey, "Operational Amplifiers, Design and
Applications," McGraw Hill Publishing Co., 1971

(8) D. E. Nelson and N. 0. Sokal, "Improving Load and Line
Transient Response of Switching Regulators by Feed For-
ward Techniques," Powercon 2 Proceedings, 1975

109

Package Outlines

SILICON GENERAL PACKAGE RATINGS

Package
Type

Thermal Resis

tance (°C/W)

Power

Dissipation

(mW)

Derate
above
25<>C

(mW/oC)

d

JC

e.

JA

Typ.

Max.

Typ.

Max.

K (TO-3)

3.0

5.5

35

45

4300

30

P (TO-220)

3.0

5.0

60

65

2000

16

R (TO-66)

5.0

6.0

40

50

3000

24

T (TO-39)

15

25

120

185

1000

6.7

T (TO-99)

25

40

150

190

680

5.4

T (TO-96)

25

40

130

165

800

6.8

T(TO-100)

25

40

150

190

680

5.4

T(TO-101)

25

40

150

190

680

5.4

J (16-pin)

45

60

80

110

1000

6.7

J (14-pin)

45

60

80

110

1000

6.7

Y (8-pin)

50

60

125

150

800

8

N (16-pin)

50

60

130

150

600

6.0

N (14-pin)

50

60

130

150

600

6.0

M (8-pin)

50

60

160

190

400

4.0

F (10-pin)

40

60

170

190

500

3.3

PLASTIC PACKAGES

0.015 U -

~~T

n n n r~i n r

uuuuuuuu

J-

MAX
0.125

N-PACKAGE
14-PIN PLASTIC

-I L«r -Ik MB

ALL LEADS ARE GOLO PLATEO

N-PACKAGE
16-PIN PLASTIC

jj— h- QMS,.

- II 0015

I, 0300

0.450 MAX •

n n n n_

ID

1
0.240
0.280

1

TUJ LJ L_l L_l

P?

I— --4 I— TYP

M-PACKAGE
8-PIN MINIDIP

POWER PACKAGES

3_

0.876 MAX Dl A -

K- PACKAGE
TO-3

.050 MAX
J.

R-PACKAGE
TO-66, 2-PIN

R-PACKAGE
TO-66, 9-PIN

FLAT PACK

F-PACKAGE
10-PIN FLATPACK

110

Package Outlines

CERAMIC PACKAGES

*-1

JV

Y-PACKAGE
8-PIN CERDIP

Vm

-w-

aJu

~*'nr'*~ ""''•'Sw

J-PACKAGE
14-PIN CERDIP

-vj.

»-

-IS-

m^

1

LttHI

TW n "^ r ^0.0«

J-PACKAGE
16-PIN CERDIP

METAL CANS

m

ts

-m

B

*

f

T-PACKAGE
TO-39

T-PACKAGE
TO-99

.010 I

So" 1 -

t?d.

rn

i

LL

MR-

._/«[

T-PACKAGE
TO-101

hJM

r

T

.MO

.ato

4-

sk ninni

T-PACKAGE
TO-96

111

INDUSTRY PACKAGE CROSS-REFERENCE

Silicon
General

NSC

Skjnetics

Fairchild

Motorola

Tl

RCA

I _

AMD

Raytheon

J

8-Lead

M
N

N

V
A

B '

T

P

P
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112

Distributors

ALABAMA

Powell Electronics
700 Arcadia Circle
Huntsville, Alabama 35801
(205) 539-2731
TWX: 810-726-2231

ARIZONA

Kachina Electronics
1425 North 27th Lane
Phoenix, Arizona 85009
(602) 269-6201

R. V. Weatherford
3355 W. Earll Drive
Phoenix, Arizona 85017
(602) 272-7144
TWX: 910-951-0636

CALIFORNIA (Northern)

Diplomat West
1118 Elko Drive
Sunnyvale, California 94086
(408) 734-1900

Intermark Electronics
1 020 Stewart Drive
Sunnyvale, California 94086
(408) 738-1 111

P. H. Components

2255 Martin Avenue, Suite E

Santa Clara, California 95050

(408) 244-8424

TWX: 910-338-0587

Western Microtechnology
977 Benicia Ave.
Sunnyvale, California 94086
(408) 737-1660

CALIFORNIA (Southern)

Intermark Electronics
1082 E.Carnegie
Santa Ana, California 92705
(714) 540-1322

Intermark Electronics
4040 Sorrento Valley Road
San Diego, California 92121
(714) 279-5200

Semicomp

3185 Airway Avenue "A"

Costa Mesa, California 92626

(714) 549-8600

TWX: 910-595-1572

Jaco Electronics

21201 Oxnard Street

Woodland Hills, California 91364

(213)884-4560

TWX: 910-494-4917

R. V. Weatherford
1 550 Babbitt Avenue
Anaheim, California 92805
(714) 547-0891
TWX: 910-593-1334

R. V. Weatherford
6921 San Fernando Road
Glendale, California 91201
(213) 849-3451
TWX: 910-498-2223

R. V. Weatherford
1095 East 3rd Street
Pomona, California 91766
(714) 623-1261
(213) 966-8461
TWX: 910-581-3811

R. V. Weatherford

7872 Raytheon Road

San Diego, California 921 1 1

(714) 278-7400

TWX: 910-335-1570

COLORADO

R. V. Weatherford
3905 S. Mariposa
Englewood, Colorado 80110
(303) 761-5432
TWX: 910-933-0173

CONNECTICUT

J. V. Electronics

690 Main Street

East Haven, Connecticut 061 52)

(203) 469-2321

FLORIDA
Diplomat/Southland

2120 Calumet Street
Clearwater, Florida 33515
(813)443-4514

Powell Electronics
1744 N.W. 69th Avenue
Miami Springs, Florida 33166
(305) 592-3260
TWX: 810-848-8040

ILLINOIS

R. M. Electronics

47 Chestnut Lane

Westmont, Illinois 60599

(312) 323-9670

Diplomat/Lakeland

2451 Brickvale Drive

Elk Grove Village, Illinois 60007

(312)595-1000

Newark Electronics
500 N. Pulski Road
Chicago, Illinois 60624
(312) 638-4411
TWX: 910-221-0268

INDIANA

Sheridan Sales
8790 Purdue Road
Indianapolis, Indiana 46268
(317)297-3146

IOWA

Deeco

2500 16th Avenue, S.W.
Cedar Rapids, Iowa 52406
(319) 365-7551
TWX: 910-525-1332

MARYLAND

Powell Electronics
1 0728 Hanna Street
Beltsville, Maryland 20705
(301) 937-4030
TWX: 710-828-9710

Technico Inc.

9130 Red Branch Road

Columbia, Maryland 21045

(301)461-2200

MASSACHUSETTS

Diplomat/IPC
559 East Street
Chicopee Falls, Mass. 01020
(413) 592-9441

Diplomat/New England, Inc.

Kuniholm Drive

Holliston, Massachusetts 01746

(617)429-4120

Gerber Electronics

852 Providence Highway
Dedham, Massachusetts 02626
(617) 329-2400
TWX: 710-394-0634

Green-Shaw Company

70 Bridge Street

Newton, Massachusetts 02195

(617) 969-8900

TLX: 92-2498

MICHIGAN

Diplomat/Northland
32708 W. 8 Mile Road
Farmington, Michigan 48024
(313) 477-3200

Sheridan Sales

P. O. Box 529

Farmington, Michigan 48024

(313)477-3800

MINNESOTA

Diplomat/Electro-Com

3816 Chandler Drive
Minneapolis, Minnesota 55421
(612) 788-8601

Industrial Components
5280 West 74th Street
Edina, Minnesota 55435
(612) 831-2666
TWX: 910-576-3153

MISSOURI

Diplomat, Inc.
2725 Mercantile Drive
St. Louis, Missouri 63144
(314) 645-8550

Olive Industrial Elect.

9910 Page Blvd.
St. Louis, Missouri 63132
(314) 426-4500
TWX: 910-763-0720

Sheridan Sales
P. O. Box 677
Florissant, Missouri 63033
(314) 837-5200

NEW JERSEY

Diplomat/IPC

490 S. Riverview Road

Totowa, New Jersey 0751 2

(201) 785-1830

NEW MEXICO

Contact Factory

NEW YORK

Diplomat Electronics
303 Crossways Park Drive
Woodbury, New York 11797
(516)921-9373
TLX: 14-4678

Summit Electronics

916 Main Street
Buffalo, New York 14202
(716) 884-3450
TWX: 710-522-1692

Summit Electronics
292 Commerce Drive
Rochester, New York 14623
(716) 334-8110

Zeus Components Inc.

500 Executive Blvd.
Elmsford, New York 10523
(914) 592-4120
TWX: 710-567-1248

OHIO

Sheridan Sales

23224 Commerce Park Road

Beach wood, Ohio 44122

(216)831-0130

Sheridan Sales
P. O. Box 37826
Cincinnati, Ohio 45222
(513) 761-5432

Sheridan Sales
2501 Neff Avenue
Dayton, Ohio 45414
(513) 223-3332

OREGON

Parrott Electronics, Inc.

7910 S.W. Cirrus Drive
Beaverton, Oregon 97005
(503)641-3355
TWX: 910-467-8720

PENNSYLVANIA

Powell Electronics

South Island Road

Philadelphia, Pennsylvania 19101

(215)365-1900

TWX: 710-670-0465

Sheridan Sales

1717 Penn Avenue, Suite 5009
Pittsburgh, Pennsylvania 15221
(412)244-1640

TEXAS

Harrison Equipment
l616McGowen
Houston, Texas 77004
(713) 652-4750
TWX: 910-881-2601

Quality Components
300 Huntland, Suite 236
Austin, Texas 78752
(512)458-4181

Quality Components
13628 Neutron Road
Dallas, Texas 75240
(214) 387-4949

Quality Components

6126Westline
Houston, Texas 77036
(713) 789-9320

R.V. Weatherford
10836 Grissom Lane
Dallas, Texas 75229
(214) 243-1571
TWX: 910-860-5544

R.V. Weatherford
3500W.T.C. Jester Blvd.
Houston, Texas 77018
(713) 688-7406
TWX: 910-881-6222

UTAH

Diplomat/Alta

3007 South West Temple

Salt Lake City, Utah 84115

(801)486-7227

WASHINGTON

R.V. Weatherford

541 Industry Drive
Seattle, Washington 98188
(206) 243-6340
TWX: 910-444-2270

WISCONSIN

Marsh Electronics
1536 So. 101st Street
Milwaukee, Wisconsin 53214
(414) 475-6000
TWX: 910-262-3322

CANADA

Future Electronics Corp.
44 Fasken Drive, Unit 24
Rexdale, Ontario
(416)677-7820

Future Electronics Corp
5647 Ferrier Street
Montreal, Quebec
(514) 735-5775
TWX: 610-421-3251

Intek Electronics Ltd.
7204 Main Street
Vancouver, B.C. V5X3J4
(604) 324-6831
TWX: 610-922-5032

113

REPRESENTATIVES

ALABAMA

Contact Factory

ALASKA

Contact Factory

ARIZONA

Q. T. Wiles & Associates

3101 E. Shea Blvd., Ste. 219
Phoenix, AZ 85028
(602)971-6250
TWX 910-950-1199

ARKANSAS

West Associates

1 3608 Midway, Suite 1 03

Dallas, TX 75241

(214)661-9400

(910)860-5433

CALIFORNIA (Northern)
Brooks Technical Group
2465 E. Bayshore Road
Palo Alto, CA 94303
(415) 328-3232
TWX 910-373-1198

CALIFORNIA (Southern)
Q. T. Wiles & Associates
11340 W. Olympic Blvd., #355
Los Angeles, CA 9.0064
(213) 478-0183
TWX 910-342-6997

Q. T. Wiles & Associates

17632 Irvine Blvd., #D
Tustin, CA 92680
(714) 832-4952

COLORADO

D-Z Associates, I no.

70 W. 6th Ave., No. 10
Denver, CO 80204
(303) 534-3649
Tlx: 45-720

CONNECTICUT
Bell Controls

,111 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753

DELAWARE

Conroy Sales

26 W. Pennsylvania Ave.

Baltimore, MD 21204

(301)296-2444

DISTRICT OF COLUMBIA

Conroy Sales

26 W. Pennsylvania Ave.

Baltimore, MD 21204

(301)296-2444

FLORIDA
H. H.P.

1651 W. McNab Road
Ft. Lauderdale, FL 33309
(305)971-5750
TWX 510-956-9402

H. H. P.

139 Candace Drive
Maitland, FL 32751
(305)831-2474
TWX 810-853-0256

GEORGIA

Contact Factory

HAWAII

Brooks Technical Group
2465 E. Bayshore Road
Palo Alto, CA 94303
(415) 328-3232
TWX 910-373-1198

IDAHO

N. R. Schultz Company
P.O. Box 156
Beaverton, OR 97005
(503) 643-1644
TWX 910-467-8707

ILLINOIS

The John G. Twist Co.

1301 Higgins Road

Elk Grove Village, I L 60007

(312) 593-0200

TWX 910-222-0433

INDIANA

SAI Marketing Corp.

2420 Burton Dr., S. E.

Grand Rapids, Ml 49506

(616)942-2504

TWX 810-242-1518

IOWA

S&O Sales

P.O. Box 667

Cedar Rapids, I A 52406

(319) 393-1845

TWX 910-525-1317

KANSAS

The John G. Twist Co.
3500 West 75th Street
Prairie Village, KS 66208
(913) 236-4646
TWX 910-743-6843

The John G. Twist Co.
260 No. Rock Rd., 240
Wichita, KS 67220
(316)686-6685
TWX 910-741-6874

KENTUCKY

SAI Marketing Corp.

35 Compark Road

Centerville, OH 45459

(513)435-3181

TWX 810-459-1647

LOUISIANA

West Associates
13608 Midway, Suite 103
Dallas, TX 75241
(214)661-9400
(910) 860-5433

MAINE
Bell Controls
1 1 1 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753

MARYLAND

Conroy Sales

26 W. Pennsylvania Ave.

Baltimore, MD 21204

(301)296-2444

MASSACHUSETTS
Bell Controls
1 1 1 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753 •

MICHIGAN

SAI Marketing Corp.
P. O. Box N
Brighton, Ml 48116
(313)227-1786
TWX 810-242-1518

SAI Marketing Corp.
2420 Burton Dr., S. E.
Grand Rapids, Ml 49506
(616)942-2504
TWX 810-242-1518

MINNESOTA

Comstrand

6279 University Ave.

Minneapolis, MN 55432

(612) 571-0000

TWX 910-576-0924

MISSISSIPPI

Contact Factory

MISSOURI

The John G. Twist Co.

677 Craig Road

St. Louis, MO 63141

(314) 432-2830

TWX 910-764-0823

NEBRASKA

The John G. Twist Co.

3100 No. 14th Street

Lincoln, NB 68521

(402)474-5151

NEVADA (Clark County only)

Q. T. Wiles 81 Associates

3101 E. Shea Blvd., Ste. 219
Phoenix, AZ 85028
(602) 971-6250
TWX 910-950-1199

NEVADA (Except Clark County)
Brooks Technical Group
2465 E. Bayshore Road
Palo Alto, CA 94303
(415) 328-3232
TWX 910-373-1198

NEW HAMPSHIRE
Bell Controls
111 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753

NEW JERSEY
R. T. Reid Associates, Inc.
705 Cedar Lane
Teaneck, NJ 07666
(201) 692-0200
TWX 710-990-5086

NEW YORK (Except NYC)
Ontec Electronic Marketing
474 Thurston Road
Rochester, NY 14619
(716) 464-8636
TWX 510-253-3841

NEW YORK CITY

R. T. Reid Associates, Inc.

705 Cedar Lane

Teaneck, NJ 07666

(201) 692-0200

TWX 710-990-5086

NORTH CAROLINA
Component Sales
P.O. Box 18821
Raleigh, NC 27609
(919) 782-8433
TWX 510-928-0513

NORTH DAKOTA

Comstrand
6279 University Ave.
Minneapolis, MN 55432
(612) 571-0000
TWX 910-576-0924

OHIO

SAI Marketing Corp.

3 Commerce Park Bldg., Ste. 140H

Beachwood,OH 44122

(216) 292-2982

TWX 810-427-9443

SAI Marketing Corp.
35 Compark Road
Centerville, OH 45459
(513)435-3181
TWX 810-459-1647

OKLAHOMA

West Associates

13608 Midway, Suite 103

Dallas, TX 75241

(214)661-9400

(910)860-5433

OREGON

N. R. Schultz Company
P.O. Box 156
Beaverton, OR 97005
(503) 643-1644
TWX 910-467-8707

PENNSYLVANIA (Eastern)

Conroy Sales
26 W. Pennsylvania Ave.
Baltimore, MD 21204
(301 ) 296-2444

PENNSYLVANIA (Western)

SAI Marketing Corp.
1050 Freeport Road
Pittsburgh, PA 15238
(412)782-5120
TWX 810-427-9443

NEW MEXICO

Contact Factory

114

REPRESENTATIVES

RHODE ISLAND
Bell Controls

1 1 1 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753

SOUTH CAROLINA
Component Sales
P.O.Box 18821
Raleigh, NC 27609
(919) 782-8433
TWX 510-928-0513

SOUTH DAKOTA

Comstrand
6279 University Ave.
Minneapolis, MN 55432
(612) 571-0000
TWX 910-576-0924

TENNESSEE

Component Sales
P.O. Box 18821
Raleigh, NC 27609
(919) 782-8433
TWX 510-928-0513

TEXAS

West Associates
13608 Midway, Suite 103
Dallas, TX 75241
(214) 661-9400
(910)860-5433

UTAH

D-Z Associates, Inc.

70 W. 6th Ave., No. 109
Denver, CO 80204
(303) 534-3649
Tlx: 45-720

VERMONT
Bell Controls
1 1 1 Lock Street
Nashua, NH 03060
(603) 882-6984
TWX 710-228-6753

VIRGINIA

Conroy Sales

26 W. Pennsylvania Ave.

Baltimore, MD 21204

(301 ) 296-2444

WASHINGTON
N. R.Schultz
P. O. Box 159
Bellevue.WA 98009
(206) 454-0300
TWX 910-443-2329

WEST VIRGINIA

SAI Marketing Corp.

3 Commerce Park Bldg., Ste. 140H,

Beachwood, OH 44122

(216)292-2982

TWX 810-427-9443

WISCONSIN (Northern)

Comstrand

6279 University Ave.

Minneapolis, MN 55432

(612) 571-0000

TWX 910-576-0924

WISCONSIN (Southern)

The John G. Twist Co.

909 No. Mayfair Road
Wauwatosa, Wl 53226
(414) 475-7755
TWX 910-262-1185

WYOMING

D-Z Associates, Inc.

70 W. 6th Ave., No. 109
Denver, CO 80204
(303) 534-3649
Tlx: 45-720

FOREIGN
AUSTRALIA
A. J. Ferguson

(Adelaide) Pty. Ltd.
44 Prospect Road
Prospect, S. Australia 5082
Tel: 51-6895
Tlx: 82635

AUSTRIA
Bacher GMBH

A1120Wien

Meidlinger Hauptstrasse 78

Tel: 93-0143

BELGIUM

Sotronic N. V.

Rue Pere De Deken 14

Pater De Deken Straat 14

1 040 Brussels

Tel: 02/7361007

Tlx: 846-21420

CANADA (Except B. C. )

RFQ Limited

385 The West Mall, 209
Etobicoke, Ontario M9C1 E7
Tel: (416)626-1445
TWX 610-492-2540

RFQ Limited
P.O. Box 213
Dollard Des Ormeaux
Quebec H9G2H8
(514) 626-8324

CANADA (B. C. only)
N. R.Schultz
P.O. Box 159
Bellevue.WA 98009
(206) 454-0300
TWX 910-443-2329

DENMARK

E. V. Johansson Elektronik

1 5 Titangade

DK-2200

Copenhagen N

Tel: (01)" 105622

Tlx: 885-16522

FINLAND

Hilvonen Technical Products

P. O. Box 201

00251 Helsinki 25

Tel: (90)440082

Tlx: 12-1886

FRANCE

Radio Equipements-Antares

Boite Postale No. 5
92301 Levallois-Perret
Paris, France
Tel: 758-11-11
Tlx: 842-620630

GERMANY

Neumuller GMBH

8021 Munchen/Taufkirchen

Eschenstr, 2

Tel: 089/6118-1

Tlx: 5-22106

INDIA

Zenith Electronics

541, Panchratna
Mama Parmanand Marg.
Bombay-400 004
Tel: 384214
Tlx: 011-3152

ISRAEL

Talviton Electronics Ltd.

P.O. B. 21104

9, Biltmor Street

Tel Aviv, Israel

Tel: 44-45-72

Tlx: VITKO 03-3400

ITALY
I.S.A.B.Spa.

20125 Milano

Via Achille Bizzoni 2

Italy

Tel: 68-86-306

Tlx: 36655

NORWAY
Henaco

Okern Torgvei 13

Boks 248

Okern, Oslo 5, Norway

Tel: 15-75-50

Tlx: 16716 HENACN

JAPAN

Hakuto Co. Ltd.
C.P.O. Box 25
Tokyo 100-91, Japan
Tel: 03-502-2211
Tlx: J22912A

SOUTH AFRICA
Electronic Bldg. Elements

South Africa (Pty) Ltd.
P.O. Box 4609
Pretoria, S.A.
Tel: 78-9221
Tlx: 960-440181

SWEDEN

Svensk Teleindustri AB

Box 502

S-1 6205 Vail ingby 5

Sweden

Tel: 08-91-04-40

Tlx: 11043

SWITZERLAND
Dimos AG

Badenerstrasse 701
CH8048 Zurich
Tel: 01-626-140
Tlx: 855/52028

UNITED KINGDOM

REL Equipment & Components

Croft House, Bancroft, Hitchin
Hertfordshire SG51BU
Tel: Hitchin 0462-50551
Tlx: 82431

115

POWER SUPPLY OUTPUT SUPERVISORY CIRCUIT

SG1543 / SG2543 / SG3543

ADVANCE DATA

Performance data described herein represent design goals.
Final device specifications are subject to change.

DESCRIPTION

This monolithic integrated circuit contains all the
functions necessary to monitor and control the output of a,
sophisticated power supply system. Over-voltage (O.V.)
sensing with provision to trigger an external SCR
"crowbar" shutdown; and under-voltage (U.V.) circuit
which can be used to monitor either the output or to
sample the input line voltage; and a third op
amp/comparator usable for current sensing (C.L.) are all
included in this IC, together with an independent,
accurate reference generator.

Both over and under voltage sensing circuits can be
externally programmed for minimum time duration of
fault before triggering. All functions contain open
collector outputs which can be used independently or
wire-or'ed together, and although the SCR trigger is
directly connected only to the over voltage sensing
circuit, it may be optionally activated by any of the other
outputs, or the outputs from additional external
comparators like the SG1 39/239/339 for multiple-output
monitoring. The O.V. circuit also includes an optional
latch and external reset capability.

The current sense circuit may be used with external
compensation as a linear amplifier or as a high-gain
comparator. Although nominally set for zero input offset,
a fixed threshold may be added with an external resistor.
Instead of current limiting, this circuit may also be used as
an additional voltage monitor.

The reference generator circuit is internally trimmed to
eliminate the need for external potentiometers and the
entire circuit may be powered directly from either the
output being monitored or from a separate bias voltage.

The SG1543 is specified for operation over the full
military temperature range of -55°C to +125°C, while the
SG2543 and SG3543 are designed for commercial
applications of 0°C to +70° C.

BLOCK DIAGRAM

SENSE ©"

OFFSET/COMP

FEATURES

• Over-voltage, under-voltage, and current
sensing circuits all included

• Reference voltage trimmed to 1% accuracy

• SCR "Crowbar" drive of 200 mA

• Programmable time delays

• Open-collector outputs and remote
activation capability

• Total standby current less than 10 mA

CHIP LAYOUT

CONNECTION DIAGRAM

TO-1 16 CERDIP PACKAGE

U.V, INDICATE

[

] U.V. DELAY

C.L. N.I. INPUT

c

] U.V. INPUT

C.L. INV INPUT

c

11 6

"j O.V. INPUT

OFFSET/COMP

:

] O.V. DELAY

C.L. OUTPUT

c

13 4

] O.V. INDICATE

GROUND

c

^ BESET

v REF

c

15 . 2

] REMOTE ACTIVATE

v,„

L

„ n ,

~J SCR. TRIGGER

116

ADVANCE DATA

POWER SUPPLY OUTPUT SUPERVISORY CIRCUIT

SG1543 / SG2543 / SG3543

ABSOLUTE MAXIMUM RATINGS

Input Supply Voltage

40V

Sense Inputs

V||\j-1.5V

SCR Trigger Current

300 mA

Indicator Output Voltage

40V

Indicator Output Sink Current

50 mA

Power Dissipation (Package
Derate Above 25°C

Limitation) 1000mW
8.0 mW/oc

Operating Temperature Range

SG1543

SG2543/3543
Storage Temperature Range

-550Cto+125QC

0OC to +70OC

-65OCto+150OC

ELECTRICAL CHARACTERISTICS

(Unless otherwise stated, th is specifications apply f or T j = -55° C to + 1 25° C for the SG 1 543 and 0° to +70° C
for the SG2543 and SG3543; and for V|N = 5 Volts to 15 Volts.)

PARAMETER

CONDITIONS

SG 1543/2543

SG3543

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

Input Voltage

Ta =25°C

4.5

-

40

4.5

-

40

Volts

Supply Current

V||\| = 40V, Outputs Open

-

10

-

10

mA

REFERENCE SECTION (pin 15)

Output Voltage

V|N = 10V,Tj = 25OC

2.48

2.50

2.52

2.48

2.50

2.52

Volts

Output Voltage

2.45

-

2.55

2.45

-

2.55

Volts

Line Regulation

V|N = 5to30V

-

10

-

10

mV

Load Regulation

IrEF = 0to 10mA

-

10

-

10

mV

Short Circuit Current

V RE F =

12

25

12

25

mA

SCR TRIGGER SECTION (Pins 1, 2, 3)

Peak Output Current

v = o

100

200

300

100

200

300

mA

Peak Output Voltage

lO = 100 mA

(V |N -2V)

-

-

(V lN -2V)

-

-

Volts

Output Off Voltage

V|N = 40V

-

0.1

-

0.1

Volts

Propagation Delay

V|N = 10V,VoD=100mV
IO= 100mA,Tj = 25°C

MS

Output Current Rise Time

mA/ M s

Remote Activate Current

V|N = 15V,Pin2 = 0V

0.5

0.5

mA

Remote Activate Voltage

Pin 2 Open

0.5

6

0.5

6

Volts

Reset Current

V|N = 15V, Pin 3 = 0V

0.5

0.5

mA

Reset Voltage

Pin 3 Open, Pin 2 = 0V

0.5

6

0.5

6

mA

COMPARATOR SECTION (Pins 6 # 7, 10, 11)

Input Voltage Range

-

(V |N -15)

-

(V |N -1-5)

Volts

Input Offset Voltage

RS =

-

5

-

-

5

-

mV

C.L. Offset Adj.

lOkftfrom Pin 12-14

50

50

mV

Input Bias Current

-

100

-

100

nA

Delay Charging Current

200

200

juA

Ind. Output Leakage
Current

Vo = 30V

_

100

100

nA

Ind. Output Saturation
Voltage

lO = -10mA

_

0.2

0.4

_

0.2

0.4

Volts

Current Limit A\/OL

RO = 2ktoV||\|

_

10

_

_

10

_

V/mV

Propagation Delay
' (OV/UV)

V|N@10V,Tj = 25°C
V verdrive= 100 mV
RO = 2ktoV|N,Tj = 250C

_

_

_

_

MS

Propagation Delay (C.L.)

-

-

-

-

juS

117

APPLICATIONS

TYPICAL APPLICATION

FROM POWER SUPPLY

SENSING MULTIPLE SUPPLY VOLTAGES

— »- TO SG139 COMPARATORS

ADDITIONAL
POSITIVE ^_
SUPPLY

NEGATIVE
SUPPLY -
VOLTAGE

SG 139 QUAD COMP.

MASTER POWER SUPPLY
"" CONDITION INDICATOR

INPUT LINE MONITOR

u - :

OVERCURRENT SHUTDOWN

MAIN SUPPLY BUSS -^—

BIAS VOLTAGE -

-®-

\1 [X

i ©-(io>-®- - <\

@--<p--<3>-

/7777 |

118

PRECISION 2.5 VOLT REFERENCE

SG1503 / SG2503 / SG3503

DESCRIPTION

This monolithic integrated circuit is a fully self-contained
precision voltage reference generator, interally trimmed
for ±1% accuracy. Requiring less than 2 mA in quiescent
current, this device can deliver in excess of 10 mA with
total load and line induced tolerances of less than 0.5%. In
addition to voltage accuracy, internal trimming achieves a
temperature coefficient of output voltage of typically
10 ppm/°C. As a result, these references are excellent
choices for application to critical instrumentation and D
to A converter systems. The SG1503 is specified for
operation over the full military temperature range of
-55° C to +125°C, while the SG2503 and SG3503 are
designed for commercial applications of 0°C to +70° C.

FEATURES

• Output voltage trimmed to ±1%

• Input voltage range of 4.5 to 40V

• Temperature coefficient of 10 ppm/°C

• Quiescent current typically 1.5 mA

• Output current in excess of 10 mA

• Interchangeable with MC1503 and AD580

ABSOLUTE MAXIMUM RATINGS

Input Voltage
Power Dissipation

Derate Over 25°C

4.5 - 40V

600 mW

4.8 mW/oc

Operating Temperature Range

SG1503

SG2503/3503
Storage Temperature Range

-55oCto+125QC

0°C to +70OC

-65QCto +150OC

CONNECTION DIAGRAMS

CHIP LAYOUT

H : 050 H

M

or Y PACKAGE

T-PACKAGE

MINIDIP

7} N.C.

TOP VIEWS

TO-39

N.C. [?

Gnd

N.C. (?

3] Gnd

©

N.C. (7

H V IN

Voy

N.C. Q[

n

3 VoUT

V|N

119

PRECISION 2.5 VOLT REFERENCE

SG1503 / SG2503 / SG3503

ELECTRICAL CHARACTERISTICS

(Input Voltage = 15V, l|_ = mA, Ta = Operating Temperature Range unless otherwise stated.)

PARAMETER

TEST CONDITIONS

SG1503/2503

SG3503

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Output Voltage

T A = 250C

2.485

2.50

2.515

2.475

2.50

2.525

Volts

Input Voltage Range

T A = 250C

4.5

-

40

4.5

-

40

Volts

Input Voltage Range

Over Operating Temperature

4.7

-

40

4.7

-

40

Volts

Line Regulation

V|N = 5to 15V

-

1

3

-

1

3

mV

Line Regulation

V|N = 15to40V

-

3

5

-

3

10

mV

Load Regulation

nlL= 10 mA

-

3

5

-

3

10

mV

Load Regulation

A«L= 10mA,V|N = 30V

-

4

8

-

4

15

mV

Temperature Regulation

-550to+1250C

-

15

20

-

-

-

mV

Temperature Regulation

CPC to +7CPC

-

2.5

5

-

5

10

mV

Quiescent Current

V| N = 40V

-

1.5

2.0

-

1.5

2.0

mA

Short Circuit Current

15

20

30

15

20

30

mA

Ripple Rejection

f = 120Hz,T A = 25OC

-

76

-

-

76

-

dB

Output Noise

B.W.= 10 kHz, Ta = 25QC

-

100

-

-

100

-

MV r ms

Stability

-

250

-

-

250

-

MV/kHr

OUTPUT VOLTAGE vs. TEMPERATURE

RIPPLE REJECTION

2.520

V| N * 15V
io = o

2,480

V|N = 15V
AV|N = 10V

T A =

250C

fiiucon General.

Frequency - Hertz

Data subject to change without notice.

120

■

fer

fcJUM

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